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TPM3012PS8

TECH PUBLIC · MOSFETs · SOP-8

TPM3012PS8 from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied to pins 2 and 3; continuous source current max -42 A.
2 S passive Source of the P-channel MOSFET, tied to pins 1 and 3.
3 S passive Source of the P-channel MOSFET, tied to pins 1 and 2.
4 G input Gate of the P-channel MOSFET; gate-source voltage limit is ±20 V, with threshold -1.2 to -2.5 V.
5 D passive Drain of the P-channel MOSFET, tied to pins 6, 7 and 8; drain-source voltage -30 V.
6 D passive Drain of the P-channel MOSFET, tied to pins 5, 7 and 8.
7 D passive Drain of the P-channel MOSFET, tied to pins 5, 6 and 8.
8 D passive Drain of the P-channel MOSFET, tied to pins 5, 6 and 7.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: TPM3012PS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tpm3012ps8-etched.step / tpm3012ps8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpm3012ps8.step / tpm3012ps8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 a2aaf966b3337729, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF