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TPM2020UX
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Shenzhen JingYang MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPM2020UX
Shenzhen JingYang · MOSFETs · SOP-8
TPM2020UX from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 2 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 3 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 4 | G | input | Gate of the P-channel MOSFET, with maximum gate-source voltage of ±10V and threshold VGS(th) of -0.4V to -1.0V at ID=-250μA. |
| 5 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 6 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 7 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 8 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPM2020UX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tpm2020ux-etched.step/tpm2020ux-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpm2020ux.step/tpm2020ux.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (6 pp, sha256
69184b65a80cba3e, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPM2020UX
**Shenzhen JingYang** · MOSFETs · SOP-8
TPM2020UX from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 2 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 3 | S | passive | Source of the P-channel MOSFET; pins 1-3 are tied to the source, with VDS rated -20V and continuous ID of -13A at TA=25℃. |
| 4 | G | input | Gate of the P-channel MOSFET, with maximum gate-source voltage of ±10V and threshold VGS(th) of -0.4V to -1.0V at ID=-250μA. |
| 5 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 6 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 7 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
| 8 | D | passive | Drain of the P-channel MOSFET; pins 5-8 are tied to the drain, with pulsed drain current IDM of -55A and RDS(ON) below 18 mohm at VGS=-4.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPM2020UX`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `tpm2020ux-etched.step` / `tpm2020ux-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpm2020ux.step` / `tpm2020ux.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen JingYang datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603131135908605952) (6 pp, sha256 `69184b65a80cba3e`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpm2020ux-datasheet.pdf)