component
TPM05K20CX
Public Made by Adomby adom
Shenzhen JingYang MOSFETs, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPM05K20CX
Shenzhen JingYang · MOSFETs · SOT-723
TPM05K20CX from Shenzhen JingYang, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate terminal of the P-channel MOSFET; typical gate-source voltage is ±8 V, and the datasheet specifies VGS(th) of -0.4 V min, -0.7 V typ, -2 V max at VDS = VGS, ID = -250 µA. |
| 2 | SOURCE | passive | Source terminal of the MOSFET; the diode forward voltage VSD is -1.1 V typical at IS = -0.5 A, VGS = 0 V. |
| 3 | DRAIN | passive | Drain terminal of the MOSFET; the drain-source voltage rating is VDS = -20 V and the continuous drain current is ID = -0.66 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOT-723 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | -20 | V | VGS = 0V, ID =-250μA | 2 | ||
| Zero gate voltage drain current | IDSS | -1 | μA | VDS =-16V, VGS = 0V | 2 | ||
| Gate-body leakage current | IGSS | -10 | 10 | μA | VGS =±8V, VDS = 0V | 2 | |
| Gate threshold voltage | VGS(th) | -0.4 | -0.7 | -2 | V | VDS =VGS, ID =-250μA | 2 |
| Drain-source on-resistance | RDS(on) | 465 | 560 | mΩ | VGS =-4.5V, ID =-0.5A | 2 | |
| Drain-source on-resistance | RDS(on) | 600 | 780 | mΩ | VGS =-2.5V, ID =-0.5A | 2 | |
| Input capacitance | Ciss | 113 | 170 | pF | VDS =-16V,VGS =0V,f =1MHz | 2 | |
| Output capacitance | Coss | 15 | 25 | pF | VDS =-16V,VGS =0V,f =1MHz | 2 | |
| Reverse transfer capacitance | Crss | 9 | 15 | pF | VDS =-16V,VGS =0V,f =1MHz | 2 | |
| Diode forward voltage | VSD | -1.1 | V | IS=-0.5A, VGS = 0V | 2 | ||
| Drain-Source Voltage | VDS | -20 | V | 1 | |||
| Gate-Source Voltage (typical) | VGS | -8 | 8 | V | 1 | ||
| Continuous Drain Current | ID | -0.66 | A | note 1 | 1 | ||
| Pulsed Drain Current | IDM | -1.2 | A | tp=10 s | 1 | ||
| Power Dissipation | PD | 150 | mW | note 1 | 1 | ||
| Thermal Resistance from Junction to Ambient | RθJA | 833 | /W | note 1 | 1 | ||
| Junction Temperature | TJ | 150 | °C | 1 | |||
| Storage Temperature | TSTG | -55 | 150 | °C | 1 | ||
| Lead Temperature for Soldering Purposes | TL | 260 | °C | 1/8 in from case for 10 s | 1 |
CAD (KiCad official)
- Symbol:
TPM05K20CX - Footprint:
Package_TO_SOT_SMD:SOT-723 - 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tpm05k20cx-etched.step/tpm05k20cx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpm05k20cx.step/tpm05k20cx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (4 pp, sha256
f92bf97e387bf651, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).