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TPL9202PWPR

Public Made by Adom

by adom

Texas Instruments ADCs/DACs - Special Purpose, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPL9202PWPR

Texas Instruments · ADCs/DACs - Special Purpose · HTSSOP-20-EP

TPL9202PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BO_OUTZ output Brown-out indicator open-drain output asserted low when supply voltage falls below threshold set by BO input, with 100 µA sink capability.
2 OUT1 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface or EN1 pin, with internal clamp diode for inductive loads.
3 OUT2 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
4 OUT3 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
5 OUT4 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
6 OUT5 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
7 OUT6 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
8 OUT7 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
9 OUT8 output Low-side relay driver output rated 150 mA at 0.4-0.7V when ON, controlled via serial interface, with internal clamp diode for inductive loads.
10 GND power_in Ground reference for voltage measurements and return paths.
11 NC unconnected No internal connection.
12 EN1 input Enable/disable input (0-5.25V logic levels) for OUT1; low or open selects serial control, high forces OUT1 always on and ignores serial input.
13 RDELAY output Constant current output (18-48 µA typical 28 µA) for charging external capacitor to set power-up reset delay; 6 ms typical with 47 nF capacitor.
14 RST bidirectional Open-drain power-on reset output asserted high at 4.25-4.5V when regulator settled and RDELAY timer expires, asserted low at 3.3-3.75V; 0.4V at 1.6 mA sink.
15 MOSI input Serial data input (0-5.25V) for 8-bit SPI master-out-slave-in communications with NCS and SCLK at up to 4 MHz clock frequency.
16 NCS input Active-low chip select input (0-5.25V) enabling SCLK and MOSI; rising edge latches serial data to output control register.
17 SCLK input Serial clock input (0-5.25V) synchronizing 8-bit serial data transmission at up to 4 MHz; must remain low when NCS is high.
18 5VOUT output Regulated 5V ± 5% output (4.75-5.25V nominal) with 200 mA source current capability from internal LDO powered by VIN 7-18V.
19 VIN power_in Unregulated input voltage (7-18V) powering the internal 5V LDO regulator and eight output driver stages; requires external filtering.
20 BO input Brown-out threshold input (0-18V) from external resistor divider; monitored to trigger BO_OUTZ low when VIN drops below programmed level.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20-EP
Category Data Acquisition
Pins 21

CAD (KiCad official)

  • Symbol: TPL9202PWPR
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tpl9202pwpr-etched.step / tpl9202pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpl9202pwpr.step / tpl9202pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 59c30a13df266f65, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF