component
TPL820F50-89TR
Public Made by Adomby adom
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
| tpl820f50-89tr-etched.glb | 16d ago |
| tpl820f50-89tr-etched.step | 16d ago |
| tpl820f50-89tr-hero.glb | 16d ago |
| tpl820f50-89tr-hero.overlay.json | 16d ago |
| tpl820f50-89tr.glb | 16d ago |
| tpl820f50-89tr.kicad_mod | 16d ago |
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| tpl820f50-89tr.lbr | 16d ago |
| tpl820f50-89tr.step | 16d ago |
TPL820F50-89TR
3PEAK · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
TPL820F50-89TR from 3PEAK, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage pin; for the TPL820F50 (5.0 V fixed) it supplies the regulated 5.0 V output, with an absolute maximum VOUT of 6 V referenced to GND. |
| 2 | GND | power_in | Ground reference pin that should be connected directly to the PCB ground plane, and the thermal pad must also be connected to the ground plane for maximum thermal performance. |
| 3 | IN | power_in | Input voltage pin; the recommended operating input range is 3.6 V to 42 V, with an absolute maximum VIN of 45 V referenced to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Maximum Input Voltage | VIN | -0.3 | 45 | V | 7 | ||
| VOUT Maximum Output Voltage | VOUT | -0.3 | 6 | V | 7 | ||
| Maximum Operating Power Dissipation | PD | 1.5 | W | 7 | |||
| Junction Temperature Range | TJ | -40 | 150 | °C | 7 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 7 | ||
| Lead Temperature (Soldering) | TL | 260 | °C | Soldering 10 sec | 7 | ||
| Input Voltage | VIN | 3.6 | 42 | V | 7 | ||
| Output Voltage | VOUT | 1.2 | 5 | V | 7 | ||
| Output Current | IOUT | 0 | 200 | mA | 7 | ||
| Operating Junction Temperature Range | TJ | -40 | 125 | °C | 7 | ||
| Operating Ambient Temperature Range | TA | -40 | 85 | °C | 7 | ||
| Power Dissipation (SOT89-3 Package) | PD | 0 | 1000 | mW | SOT89-3 Package | 7 | |
| Input voltage range | VIN | 3.6 | 42 | V | 8 | ||
| Output voltage accuracy | VOUT | -1 | 1 | % | TJ = +25°C | 8 | |
| Output voltage accuracy | VOUT | -2 | 2 | % | -40°C ≤ TJ ≤ +125°C | 8 | |
| Dropout voltage | VDO | 200 | 600 | mV | VIN = 0.98 × VOUT(NOM), IOUT = 50 mA | 8 | |
| Output current | IOUT | 0 | 200 | mA | VOUT in regulation | 8 | |
| Output current limit | ICL | 250 | 800 | mA | VOUT = 0.9 × VOUT(NOM) | 8 | |
| Ground pin current | IGND | 2 | 5 | µA | IOUT = 0 mA | 8 | |
| Ground pin current | IGND | 400 | µA | IOUT = 200 mA | 8 | ||
| Line regulation | ΔVOUT | 3 | mV | VIN = VOUT(NOM) + 1 V to 42 V, or VIN ≥ 3.6 V, IOUT = 1 mA | 8 | ||
| Load regulation | ΔVOUT | 20 | mV | IOUT = 1 mA to 200 mA | 8 | ||
| Dropout voltage | VDO | 800 | mV | VIN = 0.98 × VOUT(NOM), IOUT = 200 mA | 8 | ||
| Under-voltage lock-out threshold | UVLO | 2.9 | V | VIN rising | 8 | ||
| Power supply rejection ratio | PSRR | 75 | dB | IOUT = 10 mA, f = 100 Hz, COUT = 4.7 µF | 8 | ||
| Power supply rejection ratio | PSRR | 65 | dB | IOUT = 10 mA, f = 1 kHz, COUT = 4.7 µF | 8 | ||
| Output noise voltage | VN | 110 | µVRMS | IOUT = 10 mA, BW = 10 Hz to 100 kHz | 8 | ||
| Output noise voltage | VN | 70 | µVRMS | IOUT = 10 mA, BW = 100 Hz to 100 kHz | 8 | ||
| Thermal shutdown temperature | TSD | 160 | ºC | 8 | |||
| Thermal shutdown hysteresis | 40 | ºC | 8 | ||||
| Junction-to-ambient thermal resistance | θJA | 55 | °C/W | SOT89-3 package | 7 | ||
| Junction-to-case thermal resistance | θJC | 88 | °C/W | SOT89-3 package | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor connection, IN pin and the GND pin of the system must be as small as possible. • It is recommended to use wide trace lengths or thick copper weight to minimize I×R drop and heat dissipation. | 13 |
CAD (KiCad official)
- Symbol:
TPL820F50-89TR - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
tpl820f50-89tr-etched.step/tpl820f50-89tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpl820f50-89tr.step/tpl820f50-89tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (16 pp, sha256
9a3cb9886b82f6b0, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).