component
TPL7407LAQPWRQ1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPL7407LAQPWRQ1
Texas Instruments · Power Distribution Switches · TSSOP-16
TPL7407LAQPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | GPIO input that turns OUT1 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 2 | IN2 | input | GPIO input that turns OUT2 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 3 | IN3 | input | GPIO input that turns OUT3 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 4 | IN4 | input | GPIO input that turns OUT4 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 5 | IN5 | input | GPIO input that turns OUT5 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 6 | IN6 | input | GPIO input that turns OUT6 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 7 | IN7 | input | GPIO input that turns OUT7 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 8 | GND | power_in | Ground pin for the device; the total continuous GND-pin current is rated at 2 A maximum. |
| 9 | COM | power_in | Supply pin that must be tied to 6.5 V or higher for proper operation (30 V maximum for full output drive), powering the internal gate-drive LDO and the clamp diodes' common cathode. |
| 10 | OUT7 | output | Open-drain NMOS driver output that sinks current when IN7 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 11 | OUT6 | output | Open-drain NMOS driver output that sinks current when IN6 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 12 | OUT5 | output | Open-drain NMOS driver output that sinks current when IN5 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 13 | OUT4 | output | Open-drain NMOS driver output that sinks current when IN4 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 14 | OUT3 | output | Open-drain NMOS driver output that sinks current when IN3 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 15 | OUT2 | output | Open-drain NMOS driver output that sinks current when IN2 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 16 | OUT1 | output | Open-drain NMOS driver output that sinks current when IN1 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
TPL7407LAQPWRQ1 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tpl7407laqpwrq1-etched.step/tpl7407laqpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpl7407laqpwrq1.step/tpl7407laqpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
b8161ddfba15f00c, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPL7407LAQPWRQ1
**Texas Instruments** · Power Distribution Switches · TSSOP-16
TPL7407LAQPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | GPIO input that turns OUT1 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 2 | IN2 | input | GPIO input that turns OUT2 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 3 | IN3 | input | GPIO input that turns OUT3 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 4 | IN4 | input | GPIO input that turns OUT4 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 5 | IN5 | input | GPIO input that turns OUT5 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 6 | IN6 | input | GPIO input that turns OUT6 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 7 | IN7 | input | GPIO input that turns OUT7 on (sinks current) when driven high; VIH is at least 1.5 V, VIL is at most 0.9 V, and the input tolerates up to 30 V to GND. |
| 8 | GND | power_in | Ground pin for the device; the total continuous GND-pin current is rated at 2 A maximum. |
| 9 | COM | power_in | Supply pin that must be tied to 6.5 V or higher for proper operation (30 V maximum for full output drive), powering the internal gate-drive LDO and the clamp diodes' common cathode. |
| 10 | OUT7 | output | Open-drain NMOS driver output that sinks current when IN7 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 11 | OUT6 | output | Open-drain NMOS driver output that sinks current when IN6 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 12 | OUT5 | output | Open-drain NMOS driver output that sinks current when IN5 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 13 | OUT4 | output | Open-drain NMOS driver output that sinks current when IN4 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 14 | OUT3 | output | Open-drain NMOS driver output that sinks current when IN3 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 15 | OUT2 | output | Open-drain NMOS driver output that sinks current when IN2 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
| 16 | OUT1 | output | Open-drain NMOS driver output that sinks current when IN1 is driven high; recommended VOUT is 0 to 30 V and continuous drain current is up to 500 mA per channel. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `TPL7407LAQPWRQ1`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `tpl7407laqpwrq1-etched.step` / `tpl7407laqpwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpl7407laqpwrq1.step` / `tpl7407laqpwrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpl7407la-q1) (22 pp, sha256 `b8161ddfba15f00c`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpl7407laqpwrq1-datasheet.pdf)