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TPL7407LAPWR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPL7407LAPWR
Texas Instruments · Power Distribution Switches · TSSOP-16
TPL7407LAPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | GPIO input that drives OUT1 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 2 | IN2 | input | GPIO input that drives OUT2 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 3 | IN3 | input | GPIO input that drives OUT3 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 4 | IN4 | input | GPIO input that drives OUT4 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 5 | IN5 | input | GPIO input that drives OUT5 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 6 | IN6 | input | GPIO input that drives OUT6 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 7 | IN7 | input | GPIO input that drives OUT7 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 8 | GND | power_in | Ground pin; all voltage ratings are referenced to this pin and total continuous GND-pin current is rated at -2 A. |
| 9 | COM | power_in | Supply pin for the internal gate-drive circuitry that must be tied to 6.5 V or higher for proper operation, with a recommended range of 6.5 V to 30 V and a static current of 17 to 30 µA. |
| 10 | OUT7 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN7 is driven high, with recommended operation from 0 V to 30 V. |
| 11 | OUT6 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN6 is driven high, with recommended operation from 0 V to 30 V. |
| 12 | OUT5 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN5 is driven high, with recommended operation from 0 V to 30 V. |
| 13 | OUT4 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN4 is driven high, with recommended operation from 0 V to 30 V. |
| 14 | OUT3 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN3 is driven high, with recommended operation from 0 V to 30 V. |
| 15 | OUT2 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN2 is driven high, with recommended operation from 0 V to 30 V. |
| 16 | OUT1 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN1 is driven high, with recommended operation from 0 V to 30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
TPL7407LAPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tpl7407lapwr-etched.step/tpl7407lapwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpl7407lapwr.step/tpl7407lapwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
51b4243c936b3766, retrieved 2026-10-10, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPL7407LAPWR
**Texas Instruments** · Power Distribution Switches · TSSOP-16
TPL7407LAPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | GPIO input that drives OUT1 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 2 | IN2 | input | GPIO input that drives OUT2 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 3 | IN3 | input | GPIO input that drives OUT3 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 4 | IN4 | input | GPIO input that drives OUT4 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 5 | IN5 | input | GPIO input that drives OUT5 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 6 | IN6 | input | GPIO input that drives OUT6 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 7 | IN7 | input | GPIO input that drives OUT7 low (sinking current) when driven high; VIH is 1.5 V minimum and VIL is 0.9 V maximum, with the input rated to 30 V to GND. |
| 8 | GND | power_in | Ground pin; all voltage ratings are referenced to this pin and total continuous GND-pin current is rated at -2 A. |
| 9 | COM | power_in | Supply pin for the internal gate-drive circuitry that must be tied to 6.5 V or higher for proper operation, with a recommended range of 6.5 V to 30 V and a static current of 17 to 30 µA. |
| 10 | OUT7 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN7 is driven high, with recommended operation from 0 V to 30 V. |
| 11 | OUT6 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN6 is driven high, with recommended operation from 0 V to 30 V. |
| 12 | OUT5 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN5 is driven high, with recommended operation from 0 V to 30 V. |
| 13 | OUT4 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN4 is driven high, with recommended operation from 0 V to 30 V. |
| 14 | OUT3 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN3 is driven high, with recommended operation from 0 V to 30 V. |
| 15 | OUT2 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN2 is driven high, with recommended operation from 0 V to 30 V. |
| 16 | OUT1 | output | Open-drain NMOS driver output that sinks up to 600 mA rated drain current after IN1 is driven high, with recommended operation from 0 V to 30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `TPL7407LAPWR`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `tpl7407lapwr-etched.step` / `tpl7407lapwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpl7407lapwr.step` / `tpl7407lapwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tpl7407la.pdf) (25 pp, sha256 `51b4243c936b3766`, retrieved 2026-10-10, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpl7407lapwr-datasheet.pdf)