component
TPL7407LADR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# TPL7407LADR++**Texas Instruments** · Power Distribution Switches · SOIC-16++TPL7407LADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN1 | input | Channel 1 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 2 | IN2 | input | Channel 2 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 3 | IN3 | input | Channel 3 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 4 | IN4 | input | Channel 4 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 5 | IN5 | input | Channel 5 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 6 | IN6 | input | Channel 6 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 7 | IN7 | input | Channel 7 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down. |+| 8 | GND | power_in | Ground reference pin; common return path for all output drain currents. |+| 9 | COM | power_in | Supply pin that powers gate drive circuitry; must be tied to 6.5V or higher (operating range 6.5V to 30V) for proper operation with internal LDO regulation to 5.3V. |+| 10 | OUT7 | output | Channel 7 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 11 | OUT6 | output | Channel 6 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 12 | OUT5 | output | Channel 5 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 13 | OUT4 | output | Channel 4 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 14 | OUT3 | output | Channel 3 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 15 | OUT2 | output | Channel 2 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |+| 16 | OUT1 | output | Channel 1 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Power Management (PMIC) |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `TPL7407LADR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `tpl7407ladr-etched.step` / `tpl7407ladr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpl7407ladr.step` / `tpl7407ladr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tpl7407la.pdf) (25 pp, sha256 `51b4243c936b3766`, retrieved 2026-09-23, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tpl7407ladr-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "tpl7407ladr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Power Distribution Switches, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tpl7407ladr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tpl7407ladr.kicad_sym",+ "tpl7407ladr.kicad_mod",+ "tpl7407ladr.glb",+ "tpl7407ladr.step",+ "tpl7407ladr.lbr",+ "docs/hero.png",+ "docs/tpl7407ladr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TPL7407LADR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Distribution Switches",+ "datasheet": "https://www.ti.com/lit/ds/symlink/tpl7407la.pdf",+ "parts": {+ "symbol": "tpl7407ladr.kicad_sym",+ "footprint": "tpl7407ladr.kicad_mod",+ "model_3d": "tpl7407ladr-etched.glb",+ "model_3d_plain": "tpl7407ladr.glb",+ "model_3d_step": "tpl7407ladr-etched.step",+ "model_3d_step_plain": "tpl7407ladr.step",+ "lbr": "tpl7407ladr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2149826"+ },+ "pins": [+ {+ "number": "1",+ "name": "IN1",+ "type": "input",+ "description": "Channel 1 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "2",+ "name": "IN2",+ "type": "input",+ "description": "Channel 2 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "3",+ "name": "IN3",+ "type": "input",+ "description": "Channel 3 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "4",+ "name": "IN4",+ "type": "input",+ "description": "Channel 4 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "5",+ "name": "IN5",+ "type": "input",+ "description": "Channel 5 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "6",+ "name": "IN6",+ "type": "input",+ "description": "Channel 6 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "7",+ "name": "IN7",+ "type": "input",+ "description": "Channel 7 GPIO input that drives output low to sink current when driven high (VIH ≥ 1.5V); compatible with 1.8V to 5V logic interfaces with 1MΩ internal pull-down."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin; common return path for all output drain currents."+ },+ {+ "number": "9",+ "name": "COM",+ "type": "power_in",+ "description": "Supply pin that powers gate drive circuitry; must be tied to 6.5V or higher (operating range 6.5V to 30V) for proper operation with internal LDO regulation to 5.3V."+ },+ {+ "number": "10",+ "name": "OUT7",+ "type": "output",+ "description": "Channel 7 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "11",+ "name": "OUT6",+ "type": "output",+ "description": "Channel 6 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "12",+ "name": "OUT5",+ "type": "output",+ "description": "Channel 5 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "13",+ "name": "OUT4",+ "type": "output",+ "description": "Channel 4 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "14",+ "name": "OUT3",+ "type": "output",+ "description": "Channel 3 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "15",+ "name": "OUT2",+ "type": "output",+ "description": "Channel 2 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ },+ {+ "number": "16",+ "name": "OUT1",+ "type": "output",+ "description": "Channel 1 low-side driver output that sinks current when input is driven high; rated for 600mA per channel with VOL = 210-900mV depending on drain current."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 25,+ "cost_usd": 0.2079,+ "at": "2026-09-23T06:13:50"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tpl7407la.pdf",+ "pages": 25,+ "sha256": "51b4243c936b3766",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}