← Commit history

Publish 0.2.0

Ray ·cfdd669a9d · ·parent a6f89a2
3 files changed +23−9
README.md+14
@@ -36,6 +36,20 @@ TPL720F33-5TR from 3PEAK, in a SOT-23-5. Pinout and pin descriptions extracted f - Footprint: `Package_TO_SOT_SMD:SOT-23-5` - 3D model: SOT-23-5 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`tpl720f33-5tr.step`](tpl720f33-5tr.step) | 85 KB | You want the bare part, or you mark your own boards. |+| [`tpl720f33-5tr-etched.step`](tpl720f33-5tr-etched.step) | 2.1 MB | You want the part with `TPL720F33-5TR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 530 faces against 102 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "tpl720f33-5tr",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+8−8
@@ -4,7 +4,7 @@   "slug": "tpl720f33-5tr",   "title": "TPL720F33-5TR",   "brief": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,7 +34,7 @@         "number": "1",         "name": "IN",         "type": "power_in",-        "description": "Input voltage pin. Recommended operating range 2.4 V to 6 V (abs max 6.5 V). Bypass IN to GND with a 1 \u03bcF or greater ceramic capacitor placed close to the pin."+        "description": "Input voltage pin. Recommended operating range 2.4 V to 6 V (abs max 6.5 V). Bypass IN to GND with a 1 μF or greater ceramic capacitor placed close to the pin."       },       {         "number": "2",@@ -46,7 +46,7 @@         "number": "3",         "name": "EN",         "type": "input",-        "description": "Regulator enable input. Drive EN high (VIH \u2265 1.2 V, up to VIN) to turn the regulator on; drive low (VIL \u2264 0.4 V) to shut it down (ISHDN \u2248 0.1 \u03bcA). For automatic startup, tie EN to IN. EN pin leakage is \u2264 20 nA."+        "description": "Regulator enable input. Drive EN high (VIH ≥ 1.2 V, up to VIN) to turn the regulator on; drive low (VIL ≤ 0.4 V) to shut it down (ISHDN ≈ 0.1 μA). For automatic startup, tie EN to IN. EN pin leakage is ≤ 20 nA."       },       {         "number": "4",@@ -58,7 +58,7 @@         "number": "5",         "name": "OUT",         "type": "power_out",-        "description": "Regulated 3.3 V output pin (\u00b11% at TJ = 25 \u00b0C, \u00b13% over \u221240 \u00b0C to +125 \u00b0C). Supplies up to 400 mA with 350 mV dropout at full load. Bypass OUT to GND with a 2.2 \u03bcF (up to 10 \u03bcF) low-ESR ceramic capacitor. Actively discharged through ~190 \u03a9 when disabled."+        "description": "Regulated 3.3 V output pin (±1% at TJ = 25 °C, ±3% over −40 °C to +125 °C). Supplies up to 400 mA with 350 mV dropout at full load. Bypass OUT to GND with a 2.2 μF (up to 10 μF) low-ESR ceramic capacitor. Actively discharged through ~190 Ω when disabled."       }     ],     "provenance": {@@ -132,9 +132,9 @@     "docs/hero.png",     "docs/tpl720f33-5tr-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file