component
TPL720F33-5TR
Public Made by Adomby adom
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+98−8@@ -1,13 +1,108 @@ {+ "schema_version": 1,+ "type": "component", "slug": "tpl720f33-5tr",+ "title": "TPL720F33-5TR",+ "brief": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "pmic", "tpl720f33-5tr" ],+ "component": {+ "mpn": "TPL720F33-5TR",+ "manufacturer": "3PEAK",+ "package": "SOT-23-5",+ "pin_count": 5,+ "category": "PMIC",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d7b02437743f9c17106277085b113870.pdf",+ "parts": {+ "symbol": "tpl720f33-5tr.kicad_sym",+ "footprint": "tpl720f33-5tr.kicad_mod",+ "model_3d": "tpl720f33-5tr.glb",+ "model_3d_step": "tpl720f33-5tr.step",+ "lbr": "tpl720f33-5tr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "power_in",+ "description": "Input voltage pin. Recommended operating range 2.4 V to 6 V (abs max 6.5 V). Bypass IN to GND with a 1 \u03bcF or greater ceramic capacitor placed close to the pin."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin. Connect directly to the PCB ground plane to minimize impedance and improve thermal performance."+ },+ {+ "number": "3",+ "name": "EN",+ "type": "input",+ "description": "Regulator enable input. Drive EN high (VIH \u2265 1.2 V, up to VIN) to turn the regulator on; drive low (VIL \u2264 0.4 V) to shut it down (ISHDN \u2248 0.1 \u03bcA). For automatic startup, tie EN to IN. EN pin leakage is \u2264 20 nA."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left floating or tied to GND for board layout convenience."+ },+ {+ "number": "5",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulated 3.3 V output pin (\u00b11% at TJ = 25 \u00b0C, \u00b13% over \u221240 \u00b0C to +125 \u00b0C). Supplies up to 400 mA with 350 mV dropout at full load. Bypass OUT to GND with a 2.2 \u03bcF (up to 10 \u03bcF) low-ESR ceramic capacitor. Actively discharged through ~190 \u03a9 when disabled."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/d7b02437743f9c17106277085b113870.pdf",+ "pages": 18,+ "sha256": "c65dff82814441be",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "3PEAK",+ "Package": "SOT-23-5",+ "Category": "PMIC",+ "Pins": "5"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "tpl720f33-5tr"+ ],+ "discovery_pitch": "TPL720F33-5TR (3PEAK) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +120,5 @@ "docs/tpl720f33-5tr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }