component
TPL6305AD-ES1R
Public Made by Adomby adom
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTPL6305AD-ES1R
3PEAK · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · ESOP-8
TPL6305AD-ES1R from 3PEAK, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected internally. |
| 2 | EN | input | Regulator enable pin: drive EN high (VIH(EN) 1.1 V to 6.5 V) to turn the regulator on and low (VIL(EN) 0 V to 0.4 V) to turn it off, and it must not be left floating. |
| 3 | IN | power_in | Input voltage pin (1.4 V to 6.5 V); a 10-µF or larger ceramic capacitor from IN to ground should be placed as close to the pin as possible to reduce input jitter. |
| 4 | NC | unconnected | Not connected internally. |
| 5 | NC | unconnected | Not connected internally. |
| 6 | OUT | power_out | Regulated output voltage pin that requires a 10-µF or greater ceramic capacitor from OUT to ground, placed as close as possible to the pin, for regulator stability. |
| 7 | FB | input | Output voltage feedback pin connected to an external resistor divider to set VOUT from 0.5 V to 5.2 V, with an optional 10-nF feed-forward capacitor from FB to OUT placed as close as possible to the pin to improve transient response. |
| 8 | GND | power_in | Ground reference pin that must be connected directly to the PCB ground plane. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN, EN voltage | -0.3 | 7 | V | 5 | |||
| OUT, FB voltage | -0.3 | V | Maximum printed as VIN + 0.3 V | 5 | |||
| Junction temperature range | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 5 | ||
| Lead temperature (soldering) | TL | 260 | °C | Soldering 10 sec | 5 | ||
| IN input voltage | 1.4 | 6.5 | V | 5 | |||
| EN enable voltage | 0 | 6.5 | V | 5 | |||
| Output capacitor | COUT | 10 | µF | 5 | |||
| Junction temperature range (operating) | TJ | -40 | 125 | °C | 5 | ||
| Supply voltage range | VIN | 6.5 | V | VIN(MIN) as printed in row | 6 | ||
| GND current | IGND | 5 | 15 | mA | VIN = 6.5 V, IOUT = 5 mA | 6 | |
| EN high-level input voltage | VIH(EN) | 1.1 | 6.5 | V | Device enable | 6 | |
| EN low-level input voltage | VIL(EN) | 0 | 0.4 | V | Device disable | 6 | |
| EN leakage current | IEN | -0.5 | 0.5 | µA | VIN = 6.5 V, VEN = 0 V to 6.5 V | 6 | |
| Feedback voltage accuracy (VFB 0.5 V typ) | VFB | -2 | 2 | % | 6 | ||
| FB pin leakage current | IFB | -100 | 100 | nA | VIN = 6.5 V, stress VFB = 0.5 V | 6 | |
| Output accuracy | VOUT | -2 | 2 | % | VIN = VOUT(NOM) + 0.4 V or 1.4 V to 6.5 V, VOUT = 0.5 V to 5.2 V, IOUT = 5 mA to 3 A | 6 | |
| Dropout voltage | VDO | 40 | 100 | mV | VIN = 1.4 V, IOUT = 1 A, VFB = 0.5 V | 6 | |
| Dropout voltage | VDO | 80 | 200 | mV | VIN = 1.4 V, IOUT = 2 A, VFB = 0.5 V | 6 | |
| Dropout voltage | VDO | 140 | 300 | mV | VIN = 1.4 V, IOUT = 3 A, VFB = 0.5 V | 6 | |
| Dropout voltage | VDO | 145 | 300 | mV | VIN = 5.4 V, IOUT = 3 A, VFB = 0.5 V | 6 | |
| Output current limit | ILIM | 3.7 | 4.7 | A | VIN = 1.4 V, VOUT = 0.9 × VOUT(NOM) | 6 | |
| Thermal resistance junction-to-ambient (ESOP8) | θJA | 31.66 | °C/W | ESOP8 package | 5 | ||
| Thermal resistance junction-to-board (ESOP8) | θJB | 10.27 | °C/W | ESOP8 package | 5 | ||
| Thermal resistance junction-to-case top (ESOP8) | θJC,TOP | 45.44 | °C/W | ESOP8 package | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor connection, the IN pin and the GND pin of the system must be as small as possible. • It is recommended to use wide and thick copper to minimize I×R drop and heat dissipation. | 15 |
CAD (KiCad official)
- Symbol:
TPL6305AD-ES1R - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
tpl6305ad-es1r-etched.step/tpl6305ad-es1r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpl6305ad-es1r.step/tpl6305ad-es1r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (20 pp, sha256
d308df7926526def, retrieved 2026-11-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).