TPL5010QDDCTQ1

Texas Instruments · Timers / Counters · TSOT-23-6

TPL5010QDDCTQ1 from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Supply voltage pin; the device operates from 1.8 V to 5.5 V (VDD-GND), and a 0.1 µF X7R bypass capacitor between VDD and GND is recommended.
2	GND	power_in	Ground reference pin; the voltage between any two pins should not exceed 6 V, and input pins are at GND or VDD for the specified supply current.
3	DELAY/M_RST	input	A resistance between 500 Ω and 170 kΩ to GND selects the WAKE time interval, and a high level (VDD) lasting at least 20 ms (observation time 30 ms) applies a manual reset.
4	DONE	input	Logic input driven by the µC to signal successful WAKE processing; a low-to-high transition with a minimum pulse width of 100 ns must arrive at least 20 ms before the next WAKE rising edge, or RSTn is asserted.
5	WAKE	output	Timer output that pulses high at the end of each programmed time interval (100 ms to 7200 s) with a 20 ms pulse width, and is normally low.
6	RSTn	output	Open-drain reset output to the µC that requires a pull-up resistance (100 kΩ recommended) and is asserted low for a pulse width of 320 ms.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSOT-23-6
Category	Clock/Timing
Pins	6

CAD (KiCad official)

Symbol: TPL5010QDDCTQ1
Footprint: Package_TO_SOT_SMD:TSOT-23-6
3D model: TSOT-23-6 (KiCad packages3D, STEP)
3D model files: tpl5010qddctq1-etched.step / tpl5010qddctq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpl5010qddctq1.step / tpl5010qddctq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (25 pp, sha256 c1823684acf7f17b, retrieved 2026-10-10, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPL5010QDDCTQ1

**Texas Instruments** · Timers / Counters · TSOT-23-6

TPL5010QDDCTQ1 from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage pin; the device operates from 1.8 V to 5.5 V (VDD-GND), and a 0.1 µF X7R bypass capacitor between VDD and GND is recommended. |
| 2 | GND | power_in | Ground reference pin; the voltage between any two pins should not exceed 6 V, and input pins are at GND or VDD for the specified supply current. |
| 3 | DELAY/M_RST | input | A resistance between 500 Ω and 170 kΩ to GND selects the WAKE time interval, and a high level (VDD) lasting at least 20 ms (observation time 30 ms) applies a manual reset. |
| 4 | DONE | input | Logic input driven by the µC to signal successful WAKE processing; a low-to-high transition with a minimum pulse width of 100 ns must arrive at least 20 ms before the next WAKE rising edge, or RSTn is asserted. |
| 5 | WAKE | output | Timer output that pulses high at the end of each programmed time interval (100 ms to 7200 s) with a 20 ms pulse width, and is normally low. |
| 6 | RSTn | output | Open-drain reset output to the µC that requires a pull-up resistance (100 kΩ recommended) and is asserted low for a pulse width of 320 ms. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-6 |
| Category | Clock/Timing |
| Pins | 6 |

## CAD (KiCad official)

- Symbol: `TPL5010QDDCTQ1`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-6`
- 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `tpl5010qddctq1-etched.step` / `tpl5010qddctq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpl5010qddctq1.step` / `tpl5010qddctq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpl5010-q1) (25 pp, sha256 `c1823684acf7f17b`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tpl5010qddctq1-datasheet.pdf)