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docs tpl5010ddct: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
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tpl5010ddct-etched.fit.json tpl5010ddct: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tpl5010ddct-etched.glb tpl5010ddct: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tpl5010ddct-etched.step tpl5010ddct: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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tpl5010ddct.step Publish 0.1.0 · Ray 1mo ago

TPL5010DDCT

Texas Instruments · Timers / Clock Oscillators · SOT-23-6

TPL5010DDCT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Supply voltage input. Recommended operating range 1.8 V to 5.5 V; absolute maximum 6.0 V. Typical supply current is 35 nA at 2.5 V in operation mode.
2 GND power_in Device ground reference.
3 DELAY/M_RST input Dual-function pin: (1) Time-interval selection - a resistor REXT (500 Ω to 170 kΩ) between this pin and GND sets the WAKE interval, converted once after POR. (2) Manual reset - momentarily pulling this pin high to VDD (≥20 ms; VIH ≥ 1.5 V) triggers a manual reset (RSTn assertion). The reset switch is also connected to this pin.
4 DONE input Watchdog acknowledge input. Digital signal driven by the µC (low-to-high transition) to indicate successful processing of the WAKE signal. Must be asserted at least 20 ms before the next WAKE rising edge or the TPL5010 will assert RSTn. VIH = 0.7×VDD, VIL = 0.3×VDD.
5 WAKE output Timer output signal (push-pull). Digital pulsed output generated every tP period to wake the µC at the end of the programmed time interval. Pulse width typically 20 ms. Normally low. VOH ≥ VDD-0.3 at 100 µA, VOL ≤ 0.3 V at 100 µA.
6 RSTn output Reset output to the µC (open-drain, active low). Requires an external pull-up resistor (100 kΩ recommended to minimize current). Asserted low if DONE is not received in time, on manual reset, or during POR/REXT reading. Pulse width typically 320 ms. VOL ≤ 0.3 V at -1 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category RTC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPL5010DDCT
  • TPL5010DDCTDDCR

CAD (KiCad official)

  • Symbol: TPL5010DDCT
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tpl5010ddct-etched.step / tpl5010ddct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpl5010ddct.step / tpl5010ddct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 bc420f3ae10fe9a6, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF