TPIC6B595N

{
  "schema_version": 1,
  "type": "component",
  "slug": "tpic6b595n",
  "title": "TPIC6B595N",
  "brief": "Texas Instruments Shift Registers, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "tpic6b595n",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "TPIC6B595N",
    "manufacturer": "Texas Instruments",
    "package": "PDIP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/tpic6b595",
    "parts": {
      "symbol": "tpic6b595n.kicad_sym",
      "footprint": "tpic6b595n.kicad_mod",
      "model_3d": "tpic6b595n-hero.glb",
      "model_3d_plain": "tpic6b595n-etched.glb",
      "model_3d_step": "tpic6b595n-etched.step",
      "model_3d_step_plain": "tpic6b595n.step",
      "lbr": "tpic6b595n.lbr"
    },
    "distributor_links": {
      "lcsc": "C2692311",
      "digikey": "2156-TPIC6B595N-ND",
      "mouser": "595-TPIC6B595N"
    },
    "distributor_check": {
      "checked_at": "2026-10-13T16:56:06Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-TPIC6B595N-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-TPIC6B595N",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; leave this pin unconnected."
      },
      {
        "number": "2",
        "name": "VCC",
        "type": "power_in",
        "description": "Logic supply voltage, recommended operating range 4.5 V to 5.5 V, with a ceramic bypass capacitor placed close to this pin."
      },
      {
        "number": "3",
        "name": "SER IN",
        "type": "input",
        "description": "Serial data input to the 8-bit shift register, sampled on the rising edge of SRCK with setup and hold times of 20 ns minimum; logic high requires at least 0.85 VCC and logic low at most 0.15 VCC."
      },
      {
        "number": "4",
        "name": "DRAIN0",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "5",
        "name": "DRAIN1",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "6",
        "name": "DRAIN2",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "7",
        "name": "DRAIN3",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "8",
        "name": "SRCLR",
        "type": "input",
        "description": "Active-low shift register clear that clears all registers in the device; TI recommends clearing the device during power-up or initialization."
      },
      {
        "number": "9",
        "name": "G",
        "type": "input",
        "description": "Active-low output enable; when held high all drain outputs are turned off and the output buffers are forced low, and it can be used for global PWM dimming."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground; all voltages are referenced to GND and the DMOS sources are internally connected to GND."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground; all voltages are referenced to GND and the DMOS sources are internally connected to GND."
      },
      {
        "number": "12",
        "name": "RCK",
        "type": "input",
        "description": "Register clock; the rising edge transfers the shift register contents to the storage register, and data is valid for read and write only while RCK is low."
      },
      {
        "number": "13",
        "name": "SRCK",
        "type": "input",
        "description": "Shift register clock; data on SER IN is shifted in on the rising edge, with a minimum pulse width of 40 ns."
      },
      {
        "number": "14",
        "name": "DRAIN4",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "15",
        "name": "DRAIN5",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "16",
        "name": "DRAIN6",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "17",
        "name": "DRAIN7",
        "type": "output",
        "description": "Low-side open-drain power DMOS output rated for 50 V drain-to-source and 150 mA continuous sink current, with typical 500 mA current limit at TC = 25°C."
      },
      {
        "number": "18",
        "name": "SER OUT",
        "type": "output",
        "description": "Serial data output from the shift register, used to daisy-chain to the SER IN pin of the next device."
      },
      {
        "number": "19",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground; all voltages are referenced to GND and the DMOS sources are internally connected to GND."
      },
      {
        "number": "20",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection; leave this pin unconnected."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 4-1 lists SRCK on pin 15, but pin 15 is also listed as DRAIN5 in the same table. Pin 13 for SR; Table 4-1 lists VCC as type I. It is entered here as power_in because it is the supply pin.; The 50 V drain rating, 150 mA continuous current and 500 mA typical current limit come from the Abso",
          "1/20 pins cited to the wrong page (name found elsewhere): ['6:DRAIN2@p3']"
        ],
        "pages_sent": 28,
        "cost_usd": 0.1054,
        "at": "2026-10-13T16:55:42"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/tpic6b595",
        "pages": 28,
        "sha256": "775d4a56485fc3c2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "tpic6b595n.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          26.162,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "ca359c9b9e0ce94efcb6c96866513f659eef6517d629ace3c4a0a779f6fd57bb",
        "checked": "2026-10-13",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "tpic6b595n-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          26.162,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "7ec334c6f6d405713bd913b53863448d090d844770bd644ce0fb6360cbac1dd0",
        "checked": "2026-10-13",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "PDIP-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "tpic6b595n"
  ],
  "discovery_pitch": "TPIC6B595N (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "tpic6b595n.kicad_sym",
    "tpic6b595n.kicad_mod",
    "tpic6b595n.glb",
    "tpic6b595n.step",
    "tpic6b595n.lbr",
    "docs/hero.png",
    "docs/tpic6b595n-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "tpic6b595n-hero.glb",
    "tpic6b595n-hero.overlay.json",
    "tpic6b595n-etched.glb"
  ],
  "visibility": {
    "public": true
  }
}