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TPIC6A595NE
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Texas Instruments Shifting Register, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPIC6A595NE
Texas Instruments · Shifting Register · PDIP-20
TPIC6A595NE from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DRAIN2 | output | Open-drain DMOS output 2, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 2 | DRAIN3 | output | Open-drain DMOS output 3, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 3 | SRCLR | input | Shift register clear, active low; a low level clears the shift register. |
| 4 | G | input | Output enable, active low; high turns all drain outputs off, low makes storage register data transparent to the output buffer. |
| 5 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 6 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 7 | RCK | input | Register clock; data transfers from shift register to storage register on its rising edge, and write/read data is valid only when RCK is low. |
| 8 | SRCK | input | Shift register clock; serial data shifts in on its rising edge. |
| 9 | DRAIN4 | output | Open-drain DMOS output 4, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 10 | DRAIN5 | output | Open-drain DMOS output 5, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 11 | DRAIN6 | output | Open-drain DMOS output 6, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 12 | DRAIN7 | output | Open-drain DMOS output 7, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 13 | SEROUT | output | Serial data output for cascading to the SER IN pin of the next device. |
| 14 | LGND | power_in | Logic ground, to be connected externally at a single point to PGND so as to reduce crosstalk between logic and load circuits. |
| 15 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 16 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 17 | VCC | power_in | Logic supply voltage, recommended 4.5V to 5.5V (absolute maximum 7V). |
| 18 | SERIN | input | Serial data input to the 8-bit shift register, sampled on the rising edge of SRCK. |
| 19 | DRAIN0 | output | Open-drain DMOS output 0, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 20 | DRAIN1 | output | Open-drain DMOS output 1, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TPIC6A595NE - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
tpic6a595ne-etched.step/tpic6a595ne-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpic6a595ne.step/tpic6a595ne.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
26ea17c96981700b, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPIC6A595NE
**Texas Instruments** · Shifting Register · PDIP-20
TPIC6A595NE from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DRAIN2 | output | Open-drain DMOS output 2, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 2 | DRAIN3 | output | Open-drain DMOS output 3, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 3 | SRCLR | input | Shift register clear, active low; a low level clears the shift register. |
| 4 | G | input | Output enable, active low; high turns all drain outputs off, low makes storage register data transparent to the output buffer. |
| 5 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 6 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 7 | RCK | input | Register clock; data transfers from shift register to storage register on its rising edge, and write/read data is valid only when RCK is low. |
| 8 | SRCK | input | Shift register clock; serial data shifts in on its rising edge. |
| 9 | DRAIN4 | output | Open-drain DMOS output 4, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 10 | DRAIN5 | output | Open-drain DMOS output 5, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 11 | DRAIN6 | output | Open-drain DMOS output 6, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 12 | DRAIN7 | output | Open-drain DMOS output 7, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 13 | SEROUT | output | Serial data output for cascading to the SER IN pin of the next device. |
| 14 | LGND | power_in | Logic ground, to be connected externally at a single point to PGND so as to reduce crosstalk between logic and load circuits. |
| 15 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 16 | PGND | power_in | Power ground, internally connected to the other PGND pins and to be connected externally to power system ground to minimize parasitic impedance. |
| 17 | VCC | power_in | Logic supply voltage, recommended 4.5V to 5.5V (absolute maximum 7V). |
| 18 | SERIN | input | Serial data input to the 8-bit shift register, sampled on the rising edge of SRCK. |
| 19 | DRAIN0 | output | Open-drain DMOS output 0, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
| 20 | DRAIN1 | output | Open-drain DMOS output 1, rated 50V with 350mA continuous sink current and chopping current limit for short-circuit protection. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Logic ICs |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `TPIC6A595NE`
- Footprint: `Package_DIP:DIP-20_W7.62mm`
- 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files: `tpic6a595ne-etched.step` / `tpic6a595ne-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpic6a595ne.step` / `tpic6a595ne.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpic6a595) (21 pp, sha256 `26ea17c96981700b`, retrieved 2026-10-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpic6a595ne-datasheet.pdf)