component
TPIC44L01DBR
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Texas Instruments Gate Drivers, SSOP-24-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# TPIC44L01DBR++**Texas Instruments** · Gate Drivers · SSOP-24-208mil++TPIC44L01DBR from Texas Instruments, in a SSOP-24-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FLT | output | Open-drain logic-level real-time fault flag for shorted-load, open-load, over-battery and under-battery faults, which requires an external pullup resistor. |+| 2 | VCOMPEN | input | Fault reference select: connecting it to GND selects the internal fault reference and connecting it to VCC selects the external VCOMP reference. |+| 3 | VCOMP | input | External fault reference voltage input for shorted-load and open-load detection, used only when VCOMPEN is connected to VCC. |+| 4 | IN0 | input | Parallel gate control input for channel 0 with CMOS-compatible hysteresis, where a 1 turns GATE0 on and a 0 turns it off. |+| 5 | IN1 | input | Parallel gate control input for channel 1 with CMOS-compatible hysteresis, where a 1 turns GATE1 on and a 0 turns it off. |+| 6 | IN2 | input | Parallel gate control input for channel 2 with CMOS-compatible hysteresis, where a 1 turns GATE2 on and a 0 turns it off. |+| 7 | IN3 | input | Parallel gate control input for channel 3 with CMOS-compatible hysteresis, where a 1 turns GATE3 on and a 0 turns it off. |+| 8 | CS | input | Chip select: a high-to-low transition enables SDO, latches fault data and refreshes FLT, and a low-to-high transition latches serial data into the output control register; it has a pullup resistor. |+| 9 | SDO | tri_state | Serial data output, a 3-state output that transfers fault data and passes serial input data to the next stage, and is high-impedance while CS is high. |+| 10 | SDI | input | Serial data input clocked into the serial register on SCLK, where a 1 commands the gate output on and a 0 turns it off. |+| 11 | SCLK | input | Serial clock that shifts data into SDI and clocks serial fault data out of SDO on the falling edge. |+| 12 | VCC | power_in | Logic supply voltage, recommended 4.5 V to 5.5 V with 5 V nominal. |+| 13 | GND | power_in | Ground and substrate reference for all voltages on the device. |+| 14 | DRAIN3 | input | FET drain input for channel 3 used for open-load and shorted-load fault detection and inductive transient protection. |+| 15 | GATE3 | output | Gate drive output for the channel 3 external FET, derived from VBAT and clamped to protect the FET VGS rating. |+| 16 | DRAIN2 | input | FET drain input for channel 2 used for open-load and shorted-load fault detection and inductive transient protection. |+| 17 | GATE2 | output | Gate drive output for the channel 2 external FET, derived from VBAT and clamped to protect the FET VGS rating. |+| 18 | GATE1 | output | Gate drive output for the channel 1 external FET, derived from VBAT and clamped to protect the FET VGS rating. |+| 19 | DRAIN1 | input | FET drain input for channel 1 used for open-load and shorted-load fault detection and inductive transient protection. |+| 20 | GATE0 | output | Gate drive output for the channel 0 external FET, derived from VBAT and clamped to protect the FET VGS rating. |+| 21 | DRAIN0 | input | FET drain input for channel 0 used for open-load and shorted-load fault detection and inductive transient protection. |+| 22 | RESET | input | Active-low reset: a high-to-low transition clears all registers and flags, turns the gate outputs off and clears FLT, and it has a pullup resistor. |+| 23 | N/C | unconnected | Not connected; the pin is shown as N/C in the pin diagram and has no function listed. |+| 24 | VBAT | power_in | Battery supply voltage, recommended 8 V to 24 V, with an absolute maximum of 60 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SSOP-24-208mil |+| Category | Motor Driver ICs |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `TPIC44L01DBR`+- Footprint: `Package_SO:SSOP-24_5.3x8.2mm_P0.65mm`+- 3D model: SSOP-24-208mil (KiCad packages3D, STEP)+- 3D model files: `tpic44l01dbr-etched.step` / `tpic44l01dbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpic44l01dbr.step` / `tpic44l01dbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpic44l02) (24 pp, sha256 `0a0f55fd5c38c81c`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tpic44l01dbr-datasheet.pdf)
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it has a pullup resistor."+ },+ {+ "number": "9",+ "name": "SDO",+ "type": "tri_state",+ "description": "Serial data output, a 3-state output that transfers fault data and passes serial input data to the next stage, and is high-impedance while CS is high."+ },+ {+ "number": "10",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input clocked into the serial register on SCLK, where a 1 commands the gate output on and a 0 turns it off."+ },+ {+ "number": "11",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock that shifts data into SDI and clocks serial fault data out of SDO on the falling edge."+ },+ {+ "number": "12",+ "name": "VCC",+ "type": "power_in",+ "description": "Logic supply voltage, recommended 4.5 V to 5.5 V with 5 V nominal."+ },+ {+ "number": "13",+ "name": "GND",+ "type": "power_in",+ "description": "Ground and substrate reference for all voltages on the device."+ },+ {+ "number": "14",+ "name": "DRAIN3",+ "type": "input",+ "description": "FET drain input for channel 3 used for open-load and shorted-load fault detection and inductive transient protection."+ },+ {+ "number": "15",+ "name": "GATE3",+ "type": "output",+ "description": "Gate drive output for the channel 3 external FET, derived from VBAT and clamped to protect the FET VGS rating."+ },+ {+ "number": "16",+ "name": "DRAIN2",+ "type": "input",+ "description": "FET drain input for channel 2 used for open-load and shorted-load fault detection and inductive transient protection."+ },+ {+ "number": "17",+ "name": "GATE2",+ "type": "output",+ "description": "Gate drive output for the channel 2 external FET, derived from VBAT and clamped to protect the FET VGS rating."+ },+ {+ "number": "18",+ "name": "GATE1",+ "type": "output",+ "description": "Gate drive output for the channel 1 external FET, derived from VBAT and clamped to protect the FET VGS rating."+ },+ {+ "number": "19",+ "name": "DRAIN1",+ "type": "input",+ "description": "FET drain input for channel 1 used for open-load and shorted-load fault detection and inductive transient protection."+ },+ {+ "number": "20",+ "name": "GATE0",+ "type": "output",+ "description": "Gate drive output for the channel 0 external FET, derived from VBAT and clamped to protect the FET VGS rating."+ },+ {+ "number": "21",+ "name": "DRAIN0",+ "type": "input",+ "description": "FET drain input for channel 0 used for open-load and shorted-load fault detection and inductive transient protection."+ },+ {+ "number": "22",+ "name": "RESET",+ "type": "input",+ "description": "Active-low reset: a high-to-low transition clears all registers and flags, turns the gate outputs off and clears FLT, and it has a pullup resistor."+ },+ {+ "number": "23",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not connected; the pin is shown as N/C in the pin diagram and has no function listed."+ },+ {+ "number": "24",+ "name": "VBAT",+ "type": "power_in",+ "description": "Battery supply voltage, recommended 8 V to 24 V, with an absolute maximum of 60 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 23 is labelled N/C in the pin diagram only and is absent from the Terminal Functions table; its ; The Terminal Functions table labels FLT and SDO as I, but the datasheet describes them as an open-dr; VCC and VBAT are supply inputs labelled I in the table; they are typed power_in and their voltage li",+ "3/24 pins cited to the wrong page (name found elsewhere): ['16:DRAIN2@p4', '17:GATE2@p4', '18:GATE1@p4']"+ ],+ "pages_sent": 8,+ "cost_usd": 0.0707,+ "at": "2026-10-08T16:12:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tpic44l02",+ "pages": 24,+ "sha256": "0a0f55fd5c38c81c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tpic44l01dbr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 8.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "77dd0a1fc7e70e9eda1bfde9dde937dc6e391803cff9978790523c850c85a21d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tpic44l01dbr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 8.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "bbd2da9bd488c2597442a977c378ba92f6d0309da7dd241d807272f56b12e4d5",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}