TPH1R204PL1 from TOSHIBA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Source	passive	MOSFET source terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
2	Source	passive	MOSFET source terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
3	Source	passive	MOSFET source terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
4	Gate	input	MOSFET gate terminal; the gate-source voltage absolute maximum rating (VGSS) is ±20 V.
5	Drain	passive	MOSFET drain terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
6	Drain	passive	MOSFET drain terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
7	Drain	passive	MOSFET drain terminal; the drain-source voltage rating (VDSS) of the device is 40 V.
8	Drain	passive	MOSFET drain terminal; the drain-source voltage rating (VDSS) of the device is 40 V.

Key specifications

Parameter	Value
Manufacturer	TOSHIBA
Package	SOP-8
Category	Triode/MOS Tube/Transistor
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-source voltage	VDSS			40	V		2
Gate-source voltage	VGSS	-20		20	V		2
Drain current (DC)	ID			150	A	Tc = 25°C	2
Drain current (DC) silicon limit	ID			270	A	Silicon limit	2
Drain current (pulsed)	IDP			500	A	t = 100 µs	2
Power dissipation	PD			3	W	(Note 1), (Note 2)	2
Power dissipation	PD			0.96	W	(Note 1)	2
Single-pulse avalanche energy	EAS			125	mJ	Note 5: VDD = 32 V, Tch = 25°C (initial), L = 0.0067 mH, IAS = 120 A	2
Single-pulse avalanche current	IAS			120	A	Note 5: VDD = 32 V, Tch = 25°C (initial), L = 0.0067 mH, IAS = 120 A	2
Channel temperature	Tch			175	°C		2
Storage temperature	Tstg	-55		175	°C		2
Channel-to-case thermal resistance	Rth(ch-c)			0.88	/W	Tc = 25°C	2
Channel-to-ambient thermal resistance	Rth(ch-a)			50	/W	Ta = 25°C, Note 3: glass-epoxy board (a)	2
Channel-to-ambient thermal resistance	Rth(ch-a)			156	/W	Ta = 25°C, Note 4: glass-epoxy board (b)	2
Gate leakage current	IGSS	-0.1		0.1	µA	VGS = ±20 V, VDS = 0 V	3
Drain cut-off current	IDSS			10	µA	VDS = 40 V, VGS = 0 V	3
Drain-source breakdown voltage	V(BR)DSS	40			V	ID = 10 mA, VGS = 0 V	3
Drain-source breakdown voltage	V(BR)DSX	25			V	ID = 10 mA, VGS = -20 V	3
Gate threshold voltage	Vth	1.4		2.4	V	VDS = 10 V, ID = 0.5 mA	3
Drain-source on-resistance	RDS(ON)		1.5	2.1	mΩ	VGS = 4.5 V, ID = 50 A	3
Drain-source on-resistance	RDS(ON)		1	1.24	mΩ	VGS = 10 V, ID = 50 A	3
Input capacitance	Ciss		5500	7200	pF	VDS = 20 V, VGS = 0 V, f = 1 MHz	3
Gate resistance	rg		0.6	1.1	Ω		3
Reverse drain current (pulsed)	IDRP			500	A	t = 100 µs	4
Reverse transfer capacitance	Crss		93		pF	VDS = 20 V, VGS = 0 V, f = 1 MHz	3
Output capacitance	Coss		1300		pF	VDS = 20 V, VGS = 0 V, f = 1 MHz	3
Switching time (rise time)	tr		13		ns	VDD ≈ 20 V, VGS = 0 V/10 V, ID = 50 A, RL = 0.4 Ω, RGG = 4.7 Ω, RGS = 4.7 Ω, duty ≤ 1%, tw = 10 µs	3
Switching time (turn-on time)	ton		33		ns	VDD ≈ 20 V, VGS = 0 V/10 V, ID = 50 A, RL = 0.4 Ω, RGG = 4.7 Ω, RGS = 4.7 Ω, duty ≤ 1%, tw = 10 µs	3
Switching time (fall time)	tf		10		ns	VDD ≈ 20 V, VGS = 0 V/10 V, ID = 50 A, RL = 0.4 Ω, RGG = 4.7 Ω, RGS = 4.7 Ω, duty ≤ 1%, tw = 10 µs	3
Switching time (turn-off time)	toff		58		ns	VDD ≈ 20 V, VGS = 0 V/10 V, ID = 50 A, RL = 0.4 Ω, RGG = 4.7 Ω, RGS = 4.7 Ω, duty ≤ 1%, tw = 10 µs	3
Total gate charge (gate-source plus gate-drain)	Qg		74		nC	VDD ≈ 20 V, VGS = 10 V, ID = 50 A	3
Gate-source charge 1	Qgs1		34		nC	VDD ≈ 20 V, VGS = 4.5 V, ID = 50 A	3
Gate-drain charge	Qgd		16		nC	VDD ≈ 20 V, VGS = 10 V, ID = 50 A	3
Gate switch charge	QSW		17		nC		3
Output charge	Qoss		56		nC	VDS = 20 V, VGS = 0 V	3
Diode forward voltage	VDSF		-1.2		V	IDR = 150 A, VGS = 0 V	4
Reverse recovery time	trr		46		ns	VR = 20 V, IDR = 37.5 A, VGS = 0 V, -dIDR/dt = 100 A/µs	4
Reverse recovery charge	Qrr		46		nC	VR = 20 V, IDR = 37.5 A, VGS = 0 V, -dIDR/dt = 100 A/µs	4

CAD (KiCad official)

Symbol: TPH1R204PL1
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: tph1r204pl1-etched.step / tph1r204pl1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tph1r204pl1.step / tph1r204pl1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TOSHIBA datasheet (9 pp, sha256 1e291f92997e37b5, retrieved 2026-11-04, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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TPH1R204PL1

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