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Ray Publish 0.1.0 30046b7 13d ago

TPESD5311N

TECH PUBLIC · ESD Protection Devices · DFN1006-2

TPESD5311N from TECH PUBLIC, in a DFN1006-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IO1 passive One of the two terminals of the single-line TVS diode array, shown in the Pin Configuration diagram as the top terminal of the back-to-back diode symbol; the datasheet gives a reverse working voltage of 5 V max and 0.18 pF typical (0.25 pF max) junction capacitance IO to IO.
2 IO2 passive The other terminal of the single-line TVS diode array, shown as the bottom terminal of the back-to-back diode symbol; the datasheet gives a breakdown voltage of 6 V min and 9 V max at IT = 1 mA, with clamping voltage of 12 V max at IPP = 1 A (8/20 µs).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package DFN1006-2
Category Circuit Protection
Pins 2

CAD (KiCad official)

  • Symbol: TPESD5311N
  • Footprint: Diode_SMD:D_SOD-882
  • 3D model: DFN1006-2 (KiCad packages3D, STEP)
  • 3D model files: tpesd5311n-etched.step / tpesd5311n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpesd5311n.step / tpesd5311n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 9ff92a84e8b3f9bf, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF