component
TPE05F6S8
Public Made by Adomby adom
TECH PUBLIC ESD And Surge Protection (TVS/ESD), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPE05F6S8
TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOP-8
TPE05F6S8 from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected I/O line 1, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 2 | I/O2 | passive | ESD-protected I/O line 2, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 3 | I/O3 | passive | ESD-protected I/O line 3, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 4 | I/O4 | passive | ESD-protected I/O line 4, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 5 | I/O5 | passive | ESD-protected I/O line 5, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 6 | GND | power_in | Ground reference connected to the common rail of the diode array; tied internally to pin 7. |
| 7 | GND | power_in | Ground reference connected to the common rail of the diode array; tied internally to pin 6. |
| 8 | I/O6 | passive | ESD-protected I/O line 6, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOP-8 |
| Category | Circuit Protection |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPE05F6S8 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tpe05f6s8-etched.step/tpe05f6s8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpe05f6s8.step/tpe05f6s8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (4 pp, sha256
6cbf5968b5b5a3f9, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPE05F6S8
**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOP-8
TPE05F6S8 from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected I/O line 1, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 2 | I/O2 | passive | ESD-protected I/O line 2, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 3 | I/O3 | passive | ESD-protected I/O line 3, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 4 | I/O4 | passive | ESD-protected I/O line 4, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 5 | I/O5 | passive | ESD-protected I/O line 5, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
| 6 | GND | power_in | Ground reference connected to the common rail of the diode array; tied internally to pin 7. |
| 7 | GND | power_in | Ground reference connected to the common rail of the diode array; tied internally to pin 6. |
| 8 | I/O6 | passive | ESD-protected I/O line 6, clamps to GND with 12pF typical capacitance and VRWM of 5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOP-8 |
| Category | Circuit Protection |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPE05F6S8`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `tpe05f6s8-etched.step` / `tpe05f6s8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpe05f6s8.step` / `tpe05f6s8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885183131504641) (4 pp, sha256 `6cbf5968b5b5a3f9`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tpe05f6s8-datasheet.pdf)