component
TPD2S017DBVR
Public Made by Adomby adom
Texas Instruments ESD And Surge Protection (TVS/ESD), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPD2S017DBVR
Texas Instruments · ESD And Surge Protection (TVS/ESD) · SOT-23-6
TPD2S017DBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Ch1_Out | output | High-speed ESD clamp output for channel 1, which connects to the downstream circuit behind the 1 Ω series-resistor isolation. |
| 2 | GND | power_in | Ground reference pin; the datasheet states no further electrical limit for this pin. |
| 3 | Ch1_In | input | High-speed ESD clamp input for channel 1, with a recommended operating voltage of 0 V to VCC. |
| 4 | Ch2_In | input | High-speed ESD clamp input for channel 2, with a recommended operating voltage of 0 V to VCC. |
| 5 | VCC | power_in | Optional power supply bias, recommended operating range 0 V to 5.5 V, used to lower the I/O capacitances. |
| 6 | Ch2_Out | output | High-speed ESD clamp output for channel 2, which connects to the downstream circuit behind the 1 Ω series-resistor isolation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Diode forward voltage for lower clamp | VD | -0.6 | -0.8 | -0.95 | V | ID = 8 mA | 5 |
| Current from I/O pins | IIO | 0.01 | 0.1 | μA | VIO = 3 V | 4 | |
| Channel-to-channel resistance match | ΔRS | -15 | 8 | 15 | mΩ | VIO = 3 V | 5 |
| Break-down voltage | VBR | 11 | 12 | V | IO = 1 mA | 5 | |
| IO voltage | VIO | 0 | 6 | V | Over operating free-air temperature range | 4 | |
| Operating temperature | TA | -40 | 85 | °C | 4 | ||
| Storage temperature | Tstg | -85 | 125 | °C | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Operating voltage VCC | VCC | 0 | 5.5 | V | 4 | ||
| Operating voltage Ch1_In | Ch1_In | 0 | V | Maximum is VCC (symbolic) | 4 | ||
| Operating voltage Ch2_In | Ch2_In | 0 | V | Maximum is VCC (symbolic) | 4 | ||
| Series resistor | R | 1 | Ω | 4 | |||
| Dynamic resistance (for I/O clamp) | RDYN | 0.8 | Ω | I = 9 A | 5 | ||
| IO capacitance | CIO | 1 | pF | VIO = 2.5 V; ƒ = 10 MHz | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 192.7 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 166.2 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 39.8 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 44.7 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 39.4 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TPD2S017DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
tpd2s017dbvr-etched.step/tpd2s017dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpd2s017dbvr.step/tpd2s017dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
97a8c9b484a840b0, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).