TPD2EUSB30DRTR — 2-Channel USB 3.0 TVS ESD Array (TI)
Public Made by Adomby adom
Texas Instruments TPD2EUSB30DRTR — 2-channel TVS-based ESD protection array for USB 3.0 SuperSpeed (5 Gbps) and other high-speed differential IO. 0.7 pF typical IO-GND capacitance, IEC 61000-4-2 ±8 kV contact and air-gap, IEC 61000-4-5 5 A (8/20 µs) surge, 5.5 V reverse stand-off, flow-through pin mapping, 3-pin SOT (DRT) 1.00 × 0.80 mm.
Skills
The skills this repo ships, by tier, each with a quick health read. Install the user skills with:
adom-wiki skills install adom/tpd2eusb30drtrUse when adding ESD protection to a USB, HDMI, DisplayPort or other high-speed differential pair, or when placing, wiring or ordering the TI TPD2EUSB30DRTR. Covers pin mapping, which differential pairs it belongs on, the TPD2EUSB30 vs TPD2EUSB30A choice, placement and grounding rules for the 3-pin SOT (DRT) package, and how to pull the symbol, footprint and 3D into KiCad or Fusion 360. Trigger words: TPD2EUSB30, TPD2EUSB30DRTR, USB3 ESD protection, USB 3.0 TVS, SuperSpeed ESD diode, low capacitance ESD array, protect a differential pair, D+ D- protection, add ESD to USB, C97502, ESD array footprint, SOT-3 DRT, place ESD diode.
No dev skills in this repo.
How to build, debug, and test this app. Source-only (dev-skills/), never shipped in the tarball.
No publish skills in this repo.
The app-to-wiki publish glue. Source-only (publish-skills/), never shipped in the tarball.
Health: the size chip is green when right-sized, yellow when getting long, red when the model likely skims it. A green check is a passed preamble/structure signal; an amber mark is a gentle nudge, not a hard failure.