component
TPD2EUSB30DRTR — 2-Channel USB 3.0 TVS ESD Array (TI)
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Texas Instruments TPD2EUSB30DRTR — 2-channel TVS-based ESD protection array for USB 3.0 SuperSpeed (5 Gbps) and other high-speed differential IO. 0.7 pF typical IO-GND capacitance, IEC 61000-4-2 ±8 kV contact and air-gap, IEC 61000-4-5 5 A (8/20 µs) surge, 5.5 V reverse stand-off, flow-through pin mapping, 3-pin SOT (DRT) 1.00 × 0.80 mm.
← Commit history
Publish 1.0.1
4 files changed
+140−23
README.md+17−16@@ -1,6 +1,6 @@-# TPD2EUSB30DRTR — 2-Channel USB 3.0 TVS ESD Array (TI)+# TPD2EUSB30DRTR: 2-Channel USB 3.0 TVS ESD Array (TI) -**Texas Instruments TPD2EUSB30DRTR** — 2-channel TVS-based ESD protection array for+**Texas Instruments TPD2EUSB30DRTR** is a 2-channel TVS-based ESD protection array for USB 3.0 SuperSpeed (5 Gbps) and other high-speed differential IO. Low 0.7 pF channel capacitance and flow-through pin mapping keep it out of the way of the signal. @@ -12,9 +12,9 @@ capacitance and flow-through pin mapping keep it out of the way of the signal. | **KiCad symbol** | `TPD2EUSB30DRTR:TPD2EUSB30DRTR` | | **KiCad footprint** | `TPD2EUSB30DRTR:SOTFL35P100X50-3N` (SamacSys, part 417592) | | **3D** | `tpd2eusb30drtr.glb` (page viewer) + `tpd2eusb30drtr.step` (manufacturer model) |-| **Fusion / EAGLE** | `TPD2EUSB30DRTR.lbr` · canonical hub `tpd2eusb30drtr.adom-lbr.json` |-| **Datasheet** | [SLVSAC2G](docs/TPD2EUSB30-datasheet.pdf) · [ti.com](https://www.ti.com/lit/ds/symlink/tpd2eusb30.pdf) |-| **Order** | LCSC `C97502` · Mouser `595-TPD2EUSB30DRTR` · DigiKey `296-25509-2-ND` |+| **Fusion / EAGLE** | `TPD2EUSB30DRTR.lbr`, canonical hub `tpd2eusb30drtr.adom-lbr.json` |+| **Datasheet** | [SLVSAC2G](docs/TPD2EUSB30-datasheet.pdf), [ti.com](https://www.ti.com/lit/ds/symlink/tpd2eusb30.pdf) |+| **Order** | LCSC `C97502`, Mouser `595-TPD2EUSB30DRTR`, DigiKey `296-25509-2-ND` | ## Electrical (TPD2EUSB30, from SLVSAC2G) @@ -32,29 +32,30 @@ capacitance and flow-through pin mapping keep it out of the way of the signal. | Operating temperature | −40 … 85 °C | > The **TPD2EUSB30A** variant (same package, same footprint) drops V(RWM) to 3.6 V and-> V(BR) to 4.5 V. Use it where the protected rail never exceeds 3.6 V; this page is the+> V(BR) to 4.5 V. Use it where the protected rail never exceeds 3.6 V. This page is the > plain **TPD2EUSB30**. ## Pinout | Pin | Name | Type | Notes | |---|---|---|---|-| 1 | D+ | passive | protected line, flow-through to pin 2's pair |+| 1 | D+ | passive | protected line | | 2 | D− | passive | protected line | | 3 | GND | passive | return for both TVS channels | Flow-through mapping means the part drops straight onto a differential pair with no-stub — place it as close to the connector as the layout allows and keep the GND pin's+stub. Place it as close to the connector as the layout allows and keep the GND pin's via short and wide. ## Files -- `TPD2EUSB30DRTR.kicad_sym` — KiCad 9/10 symbol, 5 standard fields, 3 pins-- `SOTFL35P100X50-3N.kicad_mod` — KiCad 9 footprint (modern `(footprint …)` syntax)-- `tpd2eusb30drtr.step` — manufacturer STEP; `tpd2eusb30drtr.glb` — color-preserving GLB-- `TPD2EUSB30DRTR.lbr` — EAGLE/Fusion 360 Electronics library (symbol + package + deviceset)-- `tpd2eusb30drtr.adom-lbr.json` — canonical adom-lbr hub (export to Altium, KiCad, IntLib)-- `docs/TPD2EUSB30-datasheet.pdf` — TI SLVSAC2G, rev June 2021+- `TPD2EUSB30DRTR.kicad_sym`: KiCad 9/10 symbol, 5 standard fields, 3 pins+- `SOTFL35P100X50-3N.kicad_mod`: KiCad 9 footprint, modern `(footprint …)` syntax+- `tpd2eusb30drtr.step`: manufacturer STEP. `tpd2eusb30drtr.glb`: color-preserving GLB+- `TPD2EUSB30DRTR.lbr`: EAGLE / Fusion 360 Electronics library (symbol + package + deviceset)+- `tpd2eusb30drtr.adom-lbr.json`: canonical adom-lbr hub (exports to Altium, KiCad, IntLib)+- `docs/TPD2EUSB30-datasheet.pdf`: TI SLVSAC2G, revised June 2021+- `skills/tpd2eusb30drtr-usage/SKILL.md`: how to place and wire the part -CAD sourced from the SamacSys bundle (part 417592); symbol rebuilt in the Adom house style-and the footprint converted to modern KiCad syntax.+CAD came from the SamacSys bundle (part 417592). The symbol was rebuilt in the Adom house+style and the footprint converted to modern KiCad syntax.
package.json+17−3@@ -2,7 +2,8 @@ "slug": "tpd2eusb30drtr", "title": "TPD2EUSB30DRTR — 2-Channel USB 3.0 TVS ESD Array (TI)", "type": "component",- "version": "1.0.0",+ "version": "1.0.1",+ "visibility": "public", "description": "Texas Instruments TPD2EUSB30DRTR — 2-channel TVS-based ESD protection array for USB 3.0 SuperSpeed (5 Gbps) and other high-speed differential IO. 0.7 pF typical IO-GND capacitance, IEC 61000-4-2 ±8 kV contact and air-gap, IEC 61000-4-5 5 A (8/20 µs) surge, 5.5 V reverse stand-off, flow-through pin mapping, 3-pin SOT (DRT) 1.00 × 0.80 mm.", "tags": [ "component",@@ -18,6 +19,20 @@ "drt" ], "dependencies": {},+ "discovery_triggers": [+ "TPD2EUSB30",+ "TPD2EUSB30DRTR",+ "USB 3.0 ESD protection",+ "USB3 TVS diode array",+ "SuperSpeed ESD diode",+ "low capacitance ESD array",+ "protect a differential pair",+ "D+ D- ESD protection",+ "add ESD protection to USB",+ "HDMI TMDS ESD protection",+ "C97502",+ "SOT-3 DRT ESD array"+ ], "component": { "mpn": "TPD2EUSB30DRTR", "manufacturer": "Texas Instruments",@@ -52,7 +67,6 @@ "tpd2eusb30drtr.glb", "tpd2eusb30drtr.adom-lbr.json", "TPD2EUSB30DRTR.lbr",- "docs/hero.png",- "docs/TPD2EUSB30-datasheet.pdf"+ "skills/tpd2eusb30drtr-usage/SKILL.md" ] }
page.json+18−4@@ -2,7 +2,7 @@ "slug": "tpd2eusb30drtr", "title": "TPD2EUSB30DRTR — 2-Channel USB 3.0 TVS ESD Array (TI)", "type": "component",- "version": "1.0.0",+ "version": "1.0.1", "description": "Texas Instruments TPD2EUSB30DRTR — 2-channel TVS-based ESD protection array for USB 3.0 SuperSpeed (5 Gbps) and other high-speed differential IO. 0.7 pF typical IO-GND capacitance, IEC 61000-4-2 ±8 kV contact and air-gap, IEC 61000-4-5 5 A (8/20 µs) surge, 5.5 V reverse stand-off, flow-through pin mapping, 3-pin SOT (DRT) 1.00 × 0.80 mm.", "tags": [ "component",@@ -52,12 +52,26 @@ "tpd2eusb30drtr.glb", "tpd2eusb30drtr.adom-lbr.json", "TPD2EUSB30DRTR.lbr",- "docs/hero.png",- "docs/TPD2EUSB30-datasheet.pdf"+ "skills/tpd2eusb30drtr-usage/SKILL.md" ], "org": "adom", "author": { "name": "noah", "email": "[email protected]"- }+ },+ "visibility": "public",+ "discovery_triggers": [+ "TPD2EUSB30",+ "TPD2EUSB30DRTR",+ "USB 3.0 ESD protection",+ "USB3 TVS diode array",+ "SuperSpeed ESD diode",+ "low capacitance ESD array",+ "protect a differential pair",+ "D+ D- ESD protection",+ "add ESD protection to USB",+ "HDMI TMDS ESD protection",+ "C97502",+ "SOT-3 DRT ESD array"+ ] }
skills/tpd2eusb30drtr-usage/SKILL.mdadded+88@@ -0,0 +1,88 @@+---+name: tpd2eusb30drtr-usage+description: >+ How to place and wire the TI TPD2EUSB30DRTR 2-channel USB 3.0 TVS ESD array in a+ schematic and layout: pin mapping, which differential pairs it belongs on, the+ TPD2EUSB30 vs TPD2EUSB30A choice, placement and grounding rules for the 3-pin SOT+ (DRT) package, and how to pull the symbol, footprint and 3D into KiCad or Fusion 360.+ Trigger words: TPD2EUSB30, TPD2EUSB30DRTR, USB3 ESD protection, USB 3.0 TVS, SuperSpeed+ ESD diode, low capacitance ESD array, protect a differential pair, D+ D- protection,+ add ESD to USB, C97502, ESD array footprint, SOT-3 DRT, place ESD diode.+user-invocable: true+---++# Using the TPD2EUSB30DRTR++A 2-channel bidirectional TVS array. Each channel clamps one line of a differential+pair to GND. One part protects one pair, so a USB 3.0 connector needs several.++## Pin mapping++| Pin | Name | Connect to |+|---|---|---|+| 1 | D+ | one line of the pair |+| 2 | D− | the other line of the pair |+| 3 | GND | the return plane, via directly under or beside the pad |++The pinout is flow-through: the signal enters pin 1 / pin 2 and continues on the same+side, so the part sits inline with no stub. There is no polarity to get wrong between+D+ and D−, but pin 1 is marked on the footprint's silkscreen and F.Fab chamfer.++## How many, and where++Put one device on each pair that leaves the board through a connector:++- **USB 3.0 Type-A / Type-C**: one on the USB 2.0 D+/D− pair, one on each SuperSpeed+ TX pair and each RX pair. A single Type-C SuperSpeed port needs 5 of them if you+ protect both SS lanes plus USB 2.0.+- Also usable on HDMI TMDS pairs, DisplayPort lanes, and generic LVDS-class IO.+- **Not** for power rails. V(RWM) is 5.5 V and there is no surge path sized for VBUS.+ Protect VBUS with a dedicated part.++Place it between the connector and everything else, as physically close to the+connector pins as the layout allows. ESD current should reach the array before it+reaches a transceiver.++## TPD2EUSB30 vs TPD2EUSB30A++Same package, same footprint, same symbol.++| | V(RWM) | V(BR) @ 1 mA |+|---|---|---|+| TPD2EUSB30 (this page) | 5.5 V | 7 V |+| TPD2EUSB30A | 3.6 V | 4.5 V |++Use the A variant only when the protected line never exceeds 3.6 V. On a 5 V-tolerant+USB 2.0 D+/D− pair, use the plain TPD2EUSB30 on this page. Swapping is a BOM change,+not a layout change.++## Layout rules that matter++1. **Short, wide GND**. The clamp is only as good as its return. Drop a via at the+ pin 3 pad into the ground plane. Do not route pin 3 across the board.+2. **Keep the pair's geometry**. 0.7 pF is low but not zero. Do not widen the pair or+ add a stub to reach the part; route through it.+3. **Tiny package**. Body is 1.00 × 0.80 mm with 0.35 mm pitch pads. Courtyard is+ 1.82 × 1.35 mm. Check your fab's minimum for the 0.33 × 0.36 mm pads before+ committing to a dense placement.++## Getting the CAD in++```bash+adom-wiki pkg install adom/tpd2eusb30drtr # symbol + footprint + STEP + GLB + .lbr+```++- **KiCad**: add `TPD2EUSB30DRTR.kicad_sym` to sym-lib-table and the directory holding+ `SOTFL35P100X50-3N.kicad_mod` to fp-lib-table, both as the nickname+ `TPD2EUSB30DRTR`. The symbol's Footprint field already reads+ `TPD2EUSB30DRTR:SOTFL35P100X50-3N`, and the footprint points at+ `tpd2eusb30drtr.step` for the 3D viewer.+- **Fusion 360 Electronics**: open `TPD2EUSB30DRTR.lbr` directly. It carries the+ symbol, the package, and a complete deviceset.+- **Altium**: `adom-lbr export-altium tpd2eusb30drtr.adom-lbr.json` for .SchLib ++ .PcbLib, or `export-intlib` for one .IntLib.++## Ordering++LCSC `C97502`, Mouser `595-TPD2EUSB30DRTR`, DigiKey `296-25509-2-ND`. The DRTR suffix+is tape and reel. Bare `TPD2EUSB30DRT` is the same die in cut tape.