component

TPD2E009DRTR-TP

Public Made by Adom

by adom

TECH PUBLIC ESD And Surge Protection (TVS/ESD), SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcircuit protectiontpd2e009drtr-tpfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 24d ago
viewers tpd2e009drtr-tp: viewers · Ray 24d ago
package.json tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
page.json tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
README.md Publish 0.1.0 · Ray 24d ago
tpd2e009drtr-tp-etched.glb tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tpd2e009drtr-tp-etched.step tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tpd2e009drtr-tp-hero.glb tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tpd2e009drtr-tp-hero.overlay.json tpd2e009drtr-tp: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tpd2e009drtr-tp.glb plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago
tpd2e009drtr-tp.kicad_mod Publish 0.1.0 · Ray 24d ago
tpd2e009drtr-tp.kicad_sym Publish 0.1.0 · Ray 24d ago
tpd2e009drtr-tp.lbr Publish 0.1.0 · Ray 24d ago
tpd2e009drtr-tp.step plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago

TPD2E009DRTR-TP

TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-723

TPD2E009DRTR-TP from TECH PUBLIC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D+ passive ESD-protected I/O line (D+) of the USB 3.0 interface, clamped to GND, 0.4pF typical I/O to GND, working voltage up to 5.5V.
2 D- passive ESD-protected I/O line (D-) of the USB 3.0 interface, clamped to GND, 0.4pF typical I/O to GND, working voltage up to 5.5V.
3 GND power_in Common ground reference for the TVS diode array; the single lead on the opposite side of the package from D+ and D-.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-723
Category Circuit Protection
Pins 3

CAD (KiCad official)

  • Symbol: TPD2E009DRTR-TP
  • Footprint: Package_TO_SOT_SMD:SOT-723
  • 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tpd2e009drtr-tp-etched.step / tpd2e009drtr-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpd2e009drtr-tp.step / tpd2e009drtr-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 2c35757625f158a9, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF