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TPC8129

Public Made by Adom

by adom

TOSHIBA MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 12d ago
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package.json Publish 0.1.0 · Ray 12d ago
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README.md Publish 0.1.0 · Ray 12d ago
tpc8129-etched.glb Publish 0.1.0 · Ray 12d ago
tpc8129-etched.step tpc8129: factory component page (tier=mfr) · Ray 12d ago
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TPC8129

TOSHIBA · MOSFETs · SOP-8

TPC8129 from TOSHIBA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Pin 1 is a source terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
2 Source passive Pin 2 is a source terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
3 Source passive Pin 3 is a source terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
4 Gate input Pin 4 is the gate terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
5 Drain passive Pin 5 is a drain terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
6 Drain passive Pin 6 is a drain terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
7 Drain passive Pin 7 is a drain terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.
8 Drain passive Pin 8 is a drain terminal of the P-channel MOSFET, as stated in the packaging and internal circuit section.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDSS -30 V 1
Gate-source voltage VGSS -25 20 V 1
Drain current (DC) ID -9 A 1
Drain current (pulsed) IDP -36 A 1
Power dissipation PD 1.9 W t = 10 s (Note 1) 1
Power dissipation PD 1 W (Note 1) 1
Single-pulse avalanche energy EAS 21 mJ VDD = -24 V, Tch = 25 °C (initial), L = 0.2 mH, RG = 25 Ω, IAR = -9 A (Note 4) 1
Avalanche current IAR -9 A 1
Channel temperature Tch 150 °C 1
Storage temperature Tstg -55 150 °C 1
Gate leakage current IGSS -0.1 0.1 µA VGS = ±20 V, VDS = 0 V 3
Drain cut-off current IDSS -10 µA VDS = -30 V, VGS = 0 V 3
Drain-source breakdown voltage V(BR)DSS -30 V ID = -10 mA, VGS = 0 V 3
Drain-source breakdown voltage V(BR)DSX -21 V ID = -10 mA, VGS = 10 V 3
Gate threshold voltage Vth -0.8 -2 V VDS = -10 V, ID = -0.2 mA 3
Drain-source on-resistance RDS(ON) 22 28 mΩ VGS = -4.5 V, ID = -4.5 A 3
Drain-source on-resistance RDS(ON) 17 22 mΩ VGS = -10 V, ID = -4.5 A 3
Reverse drain current (pulsed) IDRP -36 A 3
Diode forward voltage VDSF 1.2 V IDR = -9 A, VGS = 0 V 3
Channel-to-ambient thermal resistance Rth(ch-a) 65.7 /W t = 10 s (Note 2) 2
Channel-to-ambient thermal resistance Rth(ch-a) 125 /W (Note 3) 2

CAD (KiCad official)

  • Symbol: TPC8129
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: tpc8129-etched.step / tpc8129-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpc8129.step / tpc8129.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (9 pp, sha256 28fe4fb815305b86, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF