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TPA2016D2RTJT

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Texas Instruments Audio Amplifiers, VQFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPA2016D2RTJT

Texas Instruments · Audio Amplifiers · VQFN-20-EP(4x4)

TPA2016D2RTJT from Texas Instruments, in a VQFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INL+ input Left channel positive audio input.
2 INL- input Left channel negative audio input.
3 AGND power_in Analog ground; all GND pins need to be connected.
4 PVDDL power_in Left channel power supply; must be the same as AVDD and PVDDR.
5 PVDDL power_in Left channel power supply; must be the same as AVDD and PVDDR.
6 OUTL+ output Left channel positive differential output.
7 OUTL- output Left channel negative differential output.
8 PGND power_in Power ground; all GND pins need to be connected.
9 OUTR- output Right channel negative differential output.
10 OUTR+ output Right channel positive differential output.
11 PVDDR power_in Right channel power supply; must be the same as AVDD and PVDDL.
12 PVDDR power_in Right channel power supply; must be the same as AVDD and PVDDL.
13 AVDD power_in Analog supply; must be the same as PVDDR and PVDDL (recommended VDD range 2.5 V to 5.5 V).
14 INR- input Right channel negative audio input.
15 INR+ input Right channel positive audio input.
16 NC unconnected Not connected.
17 SCL input I2C clock interface.
18 SDZ input Shutdown terminal (active low).
19 SDA bidirectional I2C data interface.
20 NC unconnected Not connected.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-20-EP(4x4)
Category Amplifiers/Comparators
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage AVDD, PVDDR, PVDDL VDD -0.3 6 V 3
Input voltage SDZ, INR+, INR-, INL+, INL- (upper limit printed as VDD+0.3 V) -0.3 V 3
Input voltage SDA, SCL -0.3 6 V 3
Operating free-air temperature range TA -40 85 °C 3
Operating junction temperature range TJ -40 150 °C 3
Storage temperature range Tstg -65 150 °C 3
Electro-Static Discharge Tolerance, Human Body Model (HBM) 2 KV all pins, HBM 3
Electro-Static Discharge Tolerance, Charged Device Model (CDM) 500 V all pins, CDM 3
Minimum load resistance RLOAD 3.2 Ω 3
Continuous total power dissipation, 20-pin QFN 5.2 W TA ≤ 25°C; 2-side, 2-plane PCB 3
Continuous total power dissipation, 20-pin QFN 3.12 W TA = 70°C; 2-side, 2-plane PCB 3
Continuous total power dissipation, 20-pin QFN 2.7 W TA = 85°C; 2-side, 2-plane PCB 3
Supply voltage AVDD, PVDDR, PVDDL VDD 2.5 5.5 V 4
High-level input voltage SDZ, SDA, SCL VIH 1.3 V 4
Low-level input voltage SDZ, SDA, SCL VIL 0.6 V 4
Operating free-air temperature TA -40 85 °C 4
VDD Supply voltage range VDD 2.5 3.6 5.5 V 4
Shutdown quiescent current ISDZ 0.1 1 µA SDZ = 0.35 V, VDD = 2.5 V 4
Shutdown quiescent current ISDZ 0.2 1 µA SDZ = 0.35 V, VDD = 3.6 V 4
Shutdown quiescent current ISDZ 0.3 1 µA SDZ = 0.35 V, VDD = 5.5 V 4
Software shutdown quiescent current ISWS 35 50 µA SDZ = 1.3 V, VDD = 2.5 V 4
Software shutdown quiescent current ISWS 50 70 µA SDZ = 1.3 V, VDD = 3.6 V 4
Software shutdown quiescent current ISWS 75 110 µA SDZ = 1.3 V, VDD = 5.5 V 4
Supply current IDD 3.5 4.5 mA VDD = 2.5 V 4
Supply current IDD 3.7 4.7 mA VDD = 3.6 V 4
Supply current IDD 4.5 5.5 mA VDD = 5.5 V 4
Class D Switching Frequency fSW 275 300 325 kHz 4
High-level input current IIH 1 µA VDD = 5.5 V, SDZ = 5.8 V 4
Low-level input current IIL -1 µA VDD = 5.5 V, SDZ = -0.3 V 4
Start-up time tSTART 5 ms 2.5 V ≤ VDD ≤ 5.5 V, no pop, CIN ≤ 1 μF 4
Power on reset ON threshold POR 2 2.3 V 4
Input common mode rejection CMRR -70 dB RL = 8 Ω, Vicm = 0.5 V and Vicm = VDD, 0.8 V, differential inputs shorted 4
Output offset voltage VOO -10 2 10 mV VDD = 3.6 V, AV = 6 dB, RL = 8 Ω, inputs ac grounded 4
Gain accuracy -0.5 0.5 dB Compression and limiter disabled, Gain = 0 to 30 dB 4
Power supply rejection ratio PSRR -80 dB VDD = 2.5 V to 4.7 V 4
Supply ripple rejection ratio (kSVR) kSVR -68 dB VDD = 3.6 Vdc with ac of 200 mVPP at 217 Hz 5
Frequency response FR 20 20000 Hz Av = 6 dB 5
SCL frequency fSCL 400 kHz No wait states 6
Pulse duration, SCL high tW(H) 0.6 µs 6
Pulse duration, SCL low tW(L) 1.3 µs 6
Setup time, SDA to SCL tSU(1) 100 ns 6
Hold time, SCL to SDA th1 10 ns 6
Bus free time between stop and start condition t(buf) 1.3 µs 6
Setup time, SCL to start condition tSU2 0.6 µs 6
Hold time, start condition to SCL th2 0.6 µs 6
Setup time, SCL to stop condition tSU3 0.6 µs 6
Power on reset hysteresis POR 0.2 V 4
Output impedance in shutdown mode ZOUT 2 kΩ SDZ = 0.35 V 4
Maximum output power Pomax 1.72 W THD+N = 10%, VDD = 5 V, RL = 8 Ω 5
Maximum output power Pomax 2.8 W THD+N = 10%, VDD = 5 V, RL = 4 Ω 5
Maximum output power Pomax 1.5 mW THD+N = 10% , VDD = 3.6 V, RL = 4 Ω (unit printed as mW) 5
Efficiency η 90 % THD+N = 1%, VDD = 3.6 V, RL = 8 Ω, PO = 0.63 W 5
Total harmonic distortion + noise THD+N 0.1 % faud_in = 1 kHz; PO = 550 mW; VDD = 3.6 V 5
Total harmonic distortion + noise THD+N 1 % faud_in = 1 kHz; PO = 630 mW; VDD = 3.6 V 5
Output integrated noise NfonF 44 µV Av = 6 dB 5
Output integrated noise NfoA 33 µV Av = 6 dB floor, A-weighted 5

CAD (KiCad official)

  • Symbol: TPA2016D2RTJT
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: VQFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tpa2016d2rtjt-etched.step / tpa2016d2rtjt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpa2016d2rtjt.step / tpa2016d2rtjt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 2f82e352f14660e6, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF