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docs tp8204hs6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tp8204hs6: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tp8204hs6: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tp8204hs6-etched.fit.json tp8204hs6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tp8204hs6-etched.glb tp8204hs6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tp8204hs6-etched.step tp8204hs6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tp8204hs6.glb Publish 0.1.0 · Ray
tp8204hs6.kicad_mod Publish 0.1.0 · Ray
tp8204hs6.kicad_sym Publish 0.1.0 · Ray
tp8204hs6.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tp8204hs6.step Publish 0.1.0 · Ray

TP8204HS6

TECH PUBLIC · DC-DC Converters · SOT-23-6

TP8204HS6 from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the converter. Connect to the system ground plane with a low-impedance path; the input and output capacitor return currents should be tied here.
2 LX output Switching node connecting the drains of the internal high-side and low-side MOSFETs. Connect the external inductor from LX to VOUT. Absolute maximum voltage on LX is -0.3V to 20V.
3 IN power_in Power supply input pin (VIN). Accepts 3.5V to 18V input; bypass with a low-ESR ceramic capacitor (typ. 22uF) placed close to the pin. Absolute maximum 20V.
4 FB input Feedback input for output voltage regulation. Connect to the center tap of an external resistor divider from VOUT to GND; regulated to VFB = 0.8V (typ). Absolute maximum -0.3V to 6.0V.
5 EN input Enable input. Drive high (>=1.5V) to enable the IC; drive low (<=0.5V) to disable and enter micro-power shutdown (~1uA). Do not leave floating.
6 BS passive Bootstrap pin for the high-side gate driver. Connect a ceramic bootstrap capacitor between LX and BS to form a floating supply for driving the high-side switch. Absolute maximum -0.6V to 25V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TP8204HS6

CAD (KiCad official)

  • Symbol: TP8204HS6
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tp8204hs6-etched.step / tp8204hs6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp8204hs6.step / tp8204hs6.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tp8204hs6.step 97 KB You want the bare part, or you mark your own boards.
tp8204hs6-etched.step 2.0 MB You want the part with TP8204HS6 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 489 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 2d7a82507178b9cb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF