component

TP74LV1T86S5

Public Made by Adom

by adom

TECH PUBLIC Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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TP74LV1T86S5

TECH PUBLIC · Logic Gates · SOT-23-5

TP74LV1T86S5 from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 2-input EXCLUSIVE-OR gate; 5 V tolerant input with low threshold supporting 1.8 V logic at VCC = 3.3 V.
2 B input Data input B of the 2-input EXCLUSIVE-OR gate; 5 V tolerant input with low threshold supporting 1.8 V logic at VCC = 3.3 V.
3 GND power_in Ground (0 V) reference for the device.
4 Y output Gate output Y = A XOR B, with ±25 mA output drive.
5 VCC power_in Supply voltage, operating range 1.8 V to 5.5 V (recommended 1.6 V to 5.5 V), absolute maximum +7.0 V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: TP74LV1T86S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tp74lv1t86s5-etched.step / tp74lv1t86s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp74lv1t86s5.step / tp74lv1t86s5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (9 pp, sha256 54421c85a00976da, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF