Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TP6824S6

TECH PUBLIC · DC-DC Converters · SOT-23-6

TP6824S6 from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Bootstrap pin. A capacitor (typ. 20nF-1uF) connected between LX and BS forms a floating supply for the high-side N-channel MOSFET driver. Absolute maximum continuous voltage: -0.3V to 25V.
2 GND power_in Device ground. Return for internal control circuitry and low-side MOSFET source.
3 FB input Adjustable-version feedback input. Connect to the center tap of the external R1/R2 divider from VOUT. Regulated to 0.6V (typ). Absolute maximum continuous voltage: -0.3V to 6V.
4 EN input Enable input. Drive high (>=1.5V) to enable the converter; drive low (<=0.5V) to enter micro-power shutdown. Absolute maximum continuous voltage: -0.3V to 23V.
5 IN power_in Power supply input, 3.5V to 18V operating range (UVLO ~3.0V, OVP ~19V). Bypass locally with a 22uF ceramic capacitor to GND.
6 LX power_out Switching node. Connection between the internal high-side and low-side MOSFETs; drives the external inductor. Absolute maximum continuous voltage: -0.3V to 23V. Rated 2.0A output current.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TP6824S6

CAD (KiCad official)

  • Symbol: TP6824S6
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tp6824s6-etched.step / tp6824s6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp6824s6.step / tp6824s6.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tp6824s6.step 97 KB You want the bare part, or you mark your own boards.
tp6824s6-etched.step 2.0 MB You want the part with TP6824S6 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 464 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 c1a115f5b3f71dc4, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF