component
TP5532-SR
Public Made by Adomby adom
3PEAK Precision Op Amps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TP5532-SR
3PEAK · Precision Op Amps · SOIC-8
TP5532-SR from 3PEAK, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Out A | output | Amplifier A output, which swings to within mV of each supply rail (5mV typical, 10mV max at RL=10kΩ) and is rated for ±60mA short-circuit current. |
| 2 | -In A | input | Inverting input of amplifier A, with ESD diodes to each supply so input current must be limited to less than 10mA if it exceeds a rail by more than 500mV. |
| 3 | +In A | input | Non-inverting input of amplifier A, with common-mode range of (V-)-0.1V to (V+)+0.1V and ESD diodes to each supply. |
| 4 | -Vs | power_in | Negative power supply, normally tied to ground, and may be tied to another voltage if V+ to V- stays between 1.8V and 5.5V, with a 0.1μF bypass capacitor if not grounded. |
| 5 | +In B | input | Non-inverting input of amplifier B, with common-mode range of (V-)-0.1V to (V+)+0.1V and ESD diodes to each supply. |
| 6 | -In B | input | Inverting input of amplifier B, with ESD diodes to each supply so input current must be limited to less than 10mA if it exceeds a rail by more than 500mV. |
| 7 | Out B | output | Amplifier B output, which swings to within mV of each supply rail (5mV typical, 10mV max at RL=10kΩ) and is rated for ±60mA short-circuit current. |
| 8 | +Vs | power_in | Positive power supply, typically 1.8V to 5.5V (6V absolute maximum), with a 0.1μF bypass capacitor placed as close to the part as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | 5.5 | V | 3 | ||
| Quiescent current per amplifier | IQ | 34 | 40 | μA | IO = 0 | 3 | |
| Quiescent current over temperature | IQ | 55 | μA | Over temperature | 3 | ||
| Input Offset Voltage | VOS | 2 | 10 | μV | Input grounded, unity gain. | 3 | |
| Offset voltage drift vs temperature | dVOS/dT | 0.008 | 0.05 | μV/°C | vs temperature | 3 | |
| Input Bias Current | IB | -200 | 50 | 200 | pA | 3 | |
| Input Bias Current over temperature | IB | 800 | pA | Over temperature | 3 | ||
| Input Offset Current | IOS | -400 | 100 | 400 | pA | 3 | |
| Common-mode voltage range | VCM | -0.1 | 0.1 | V | Printed as (V-)-0.1 min and (V+)+0.1 max, relative to supply rails | 3 | |
| Common-mode rejection ratio | CMRR | 110 | 130 | dB | 3 | ||
| Output voltage swing from rail | VO | 5 | 10 | mV | RL=10kΩ | 3 | |
| Output voltage swing from rail over temperature | VO | 10 | mV | Over temperature, RL=10kΩ | 3 | ||
| Open-loop voltage gain | AVOL | 100 | 120 | dB | (V-)+100mV<VO<(V+)-100mV, RL = 100kΩ | 3 | |
| Supply voltage (absolute maximum) | 6 | V | Supply Voltage | 2 | |||
| Input voltage | -0.2 | 0.2 | V | Printed as (V-)-0.2 to (V+)+0.2, relative to supply rails | 2 | ||
| Input current | -20 | 20 | mA | +IN, -IN, Note 2 | 2 | ||
| Output current | -60 | 60 | mA | OUT | 2 | ||
| Current at supply pins | -50 | 50 | mA | Supply pins | 2 | ||
| Operating temperature range | TA | -40 | 125 | °C | 2 | ||
| Maximum junction temperature | TJ | 150 | °C | 2 | |||
| Storage temperature range | TSTG | -65 | 150 | °C | 2 | ||
| Lead temperature (soldering) | 260 | °C | Soldering, 10 sec | 2 | |||
| Thermal resistance junction to ambient, SOIC-8 | θJA | 158 | °C/W | SOIC-8; short traces connected to the leads | 3 |
CAD (KiCad official)
- Symbol:
TP5532-SR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tp5532-sr-etched.step/tp5532-sr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tp5532-sr.step/tp5532-sr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (16 pp, sha256
7b0027d9909aee84, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TP5532-SR
**3PEAK** · Precision Op Amps · SOIC-8
TP5532-SR from 3PEAK, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Out A | output | Amplifier A output, which swings to within mV of each supply rail (5mV typical, 10mV max at RL=10kΩ) and is rated for ±60mA short-circuit current. |
| 2 | -In A | input | Inverting input of amplifier A, with ESD diodes to each supply so input current must be limited to less than 10mA if it exceeds a rail by more than 500mV. |
| 3 | +In A | input | Non-inverting input of amplifier A, with common-mode range of (V-)-0.1V to (V+)+0.1V and ESD diodes to each supply. |
| 4 | -Vs | power_in | Negative power supply, normally tied to ground, and may be tied to another voltage if V+ to V- stays between 1.8V and 5.5V, with a 0.1μF bypass capacitor if not grounded. |
| 5 | +In B | input | Non-inverting input of amplifier B, with common-mode range of (V-)-0.1V to (V+)+0.1V and ESD diodes to each supply. |
| 6 | -In B | input | Inverting input of amplifier B, with ESD diodes to each supply so input current must be limited to less than 10mA if it exceeds a rail by more than 500mV. |
| 7 | Out B | output | Amplifier B output, which swings to within mV of each supply rail (5mV typical, 10mV max at RL=10kΩ) and is rated for ±60mA short-circuit current. |
| 8 | +Vs | power_in | Positive power supply, typically 1.8V to 5.5V (6V absolute maximum), with a 0.1μF bypass capacitor placed as close to the part as possible. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VDD | 1.8 | | 5.5 | V | | 3 |
| Quiescent current per amplifier | IQ | | 34 | 40 | μA | IO = 0 | 3 |
| Quiescent current over temperature | IQ | | | 55 | μA | Over temperature | 3 |
| Input Offset Voltage | VOS | | 2 | 10 | μV | Input grounded, unity gain. | 3 |
| Offset voltage drift vs temperature | dVOS/dT | | 0.008 | 0.05 | μV/°C | vs temperature | 3 |
| Input Bias Current | IB | -200 | 50 | 200 | pA | | 3 |
| Input Bias Current over temperature | IB | | | 800 | pA | Over temperature | 3 |
| Input Offset Current | IOS | -400 | 100 | 400 | pA | | 3 |
| Common-mode voltage range | VCM | -0.1 | | 0.1 | V | Printed as (V-)-0.1 min and (V+)+0.1 max, relative to supply rails | 3 |
| Common-mode rejection ratio | CMRR | 110 | 130 | | dB | | 3 |
| Output voltage swing from rail | VO | | 5 | 10 | mV | RL=10kΩ | 3 |
| Output voltage swing from rail over temperature | VO | | | 10 | mV | Over temperature, RL=10kΩ | 3 |
| Open-loop voltage gain | AVOL | 100 | 120 | | dB | (V-)+100mV<VO<(V+)-100mV, RL = 100kΩ | 3 |
| Supply voltage (absolute maximum) | | | | 6 | V | Supply Voltage | 2 |
| Input voltage | | -0.2 | | 0.2 | V | Printed as (V-)-0.2 to (V+)+0.2, relative to supply rails | 2 |
| Input current | | -20 | | 20 | mA | +IN, -IN, Note 2 | 2 |
| Output current | | -60 | | 60 | mA | OUT | 2 |
| Current at supply pins | | -50 | | 50 | mA | Supply pins | 2 |
| Operating temperature range | TA | -40 | | 125 | °C | | 2 |
| Maximum junction temperature | TJ | | | 150 | °C | | 2 |
| Storage temperature range | TSTG | -65 | | 150 | °C | | 2 |
| Lead temperature (soldering) | | | | 260 | °C | Soldering, 10 sec | 2 |
| Thermal resistance junction to ambient, SOIC-8 | θJA | | 158 | | °C/W | SOIC-8; short traces connected to the leads | 3 |
## CAD (KiCad official)
- Symbol: `TP5532-SR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tp5532-sr-etched.step` / `tp5532-sr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tp5532-sr.step` / `tp5532-sr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [3PEAK datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879917123977216) (16 pp, sha256 `7b0027d9909aee84`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tp5532-sr-datasheet.pdf)