component
TP4056-MS
Public Made by Adomby adom
MSKSEMI Battery Management, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTP4056-MS
MSKSEMI · Battery Management · SOP-8-EP
TP4056-MS from MSKSEMI, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature sense input for the battery's NTC thermistor and divider; charging pauses if VTEMP is below 45%×VCC or above 80%×VCC, and tying this pin to GND disables temperature monitoring. |
| 2 | PROG | passive | Constant-current charge setting and monitor pin: a resistor from PROG to GND sets the charge current (RPROG = 1 kΩ gives about 1000 mA), with PROG at 1.0 V in current mode and charge termination detected when PROG falls below 100 mV. |
| 3 | GND | power_in | Ground reference for the charger; the exposed thermal pad may also be grounded. |
| 4 | VCC | power_in | Input supply pin for the charger, specified at 4.2 V to 9.0 V in operation with an absolute maximum of 9 V, and the charger stays in shutdown until VCC rises above the 3.6 V UVLO threshold. |
| 5 | BAT | power_out | Charge current output to the single-cell Li-ion battery, regulated to a 4.2 V float voltage; the absolute range is -4.35 V to 7 V and reverse-battery leakage is at most 5 mA. |
| 6 | STDBY | output | Open-drain charge-complete indicator that pulls low at the end of charging, with a maximum output low voltage of 0.6 V at 5 mA. |
| 7 | CHRG | output | Open-drain charging status output that pulls low during a charge cycle and is high-impedance otherwise, with a maximum output low voltage of 0.6 V at 5 mA. |
| 8 | CE | input | Chip enable input: driving it high starts charging, while driving it low stops charging and puts the charger into shutdown; its absolute maximum rating is 10 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TP4056-MS - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tp4056-ms-etched.step/tp4056-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tp4056-ms.step/tp4056-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (13 pp, sha256
fd15593d4bfdd63f, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).