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docs tp4054s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tp4054s5: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
tp4054s5-etched.fit.json tp4054s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp4054s5-etched.glb tp4054s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp4054s5-etched.step tp4054s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp4054s5.glb Publish 0.1.0 · Ray 1mo ago
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tp4054s5.step Publish 0.1.0 · Ray 1mo ago

TP4054S5

TECH PUBLIC · Battery Management · SOT-23-5

TP4054S5 from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CHRG output Open-drain charge status output. Pulled low by an internal N-channel MOSFET during charging; high-impedance when charging completes or when the part detects an under-voltage-lockout condition. Drives an external LED (typ. via 1 kΩ to VCC); with a 1 µF cap from BAT to GND the LED flashes rapidly when no battery is present.
2 GND power_in Device ground return.
3 BAT power_out Charge current output to the Li-ion cell. Sources up to 500 mA and regulates the final float voltage to 4.2 V. Auto-disconnects from VCC when the charger is disabled or in shutdown; internal protection allows ~1 mA to flow between GND and BAT when the battery is reverse-connected, protecting the ESD diode.
4 VCC power_in Positive supply input from the USB or adapter source. Operating range 4.3 V-7 V (absolute max 11 V); requires 0.1 µF-1 µF local decoupling. When VCC - VBAT drops below 30 mV the part enters sleep mode and BAT current falls below 2 µA.
5 PROG input Charge-current program, monitor, and shutdown pin. A 1% resistor to GND sets IBAT = (VPROG / RPROG) × 1000 (e.g. RPROG = 2 kΩ → 500 mA, 10 kΩ → 100 mA); pin sits at ~1 V in constant-current mode. Disconnecting RPROG lets an internal 2.5 µA source pull PROG above the 1.0 V manual-shutdown threshold, stopping charging and dropping ICC to ~40 µA.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TP4054S5

CAD (KiCad official)

  • Symbol: TP4054S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tp4054s5-etched.step / tp4054s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp4054s5.step / tp4054s5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 76c5c9c8cfe49219, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF