component
TP2122-SR
Public Made by Adomby adom
3PEAK Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTP2122-SR
3PEAK · Operational Amplifier · SOIC-8
TP2122-SR from 3PEAK, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Out A | output | Output of amplifier A, which swings to within 5 mV of either supply rail at RLOAD = 100 kΩ per the output swing specification. |
| 2 | -In A | input | Inverting input of amplifier A, whose voltage must stay within (-VS) - 0.3 V to (+VS) + 0.3 V per the absolute maximum input voltage rating. |
| 3 | +In A | input | Non-inverting input of amplifier A, whose voltage must stay within (-VS) - 0.3 V to (+VS) + 0.3 V per the absolute maximum input voltage rating. |
| 4 | -VS | power_in | Negative power supply, normally tied to GND; it may be tied to another voltage when (+VS) - (-VS) is 1.8 V to 5.5 V, and if not grounded it should be bypassed with 0.1 μF as close to the part as possible. |
| 5 | +In B | input | Non-inverting input of amplifier B, whose voltage must stay within (-VS) - 0.3 V to (+VS) + 0.3 V per the absolute maximum input voltage rating. |
| 6 | -In B | input | Inverting input of amplifier B, whose voltage must stay within (-VS) - 0.3 V to (+VS) + 0.3 V per the absolute maximum input voltage rating. |
| 7 | Out B | output | Output of amplifier B, which swings to within 5 mV of either supply rail at RLOAD = 100 kΩ per the output swing specification. |
| 8 | +VS | power_in | Positive power supply, typically 1.8 V to 5.5 V, with split supplies allowed when (+VS) - (-VS) is 1.8 V to 5.5 V, and a 0.1 μF bypass capacitor should be placed as close to the part as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage: (+VS), (−VS) | 6.5 | V | 7 | ||||
| Input Current: +IN, -IN | -10 | 10 | mA | 7 | |||
| TA Operating Temperature Range | TA | -40 | 125 | ℃ | 7 | ||
| TSTG Storage Temperature Range | TSTG | -65 | 150 | ℃ | 7 | ||
| TJ Maximum Junction Temperature | TJ | 150 | ℃ | 7 | |||
| TL Lead Temperature | TL | 260 | ℃ | Soldering, 10 sec | 7 | ||
| Input Offset Voltage | VOS | -1.5 | 0.1 | 1.5 | mV | VCM = VDD / 2, VCM = GND | 8 |
| Common-Mode Rejection Ratio | CMRR | 60 | 100 | dB | VCM = 0.1 V to 4.9 V | 8 | |
| Power Supply Rejection Ratio | PSRR | 70 | 92 | dB | VDD = 1.8 V to 5.5 V | 8 | |
| Open-Loop Large Signal Gain | AVOL | 80 | 120 | dB | VOUT = 0.5 V to 4.5 V, RLOAD = 100 kΩ | 8 | |
| Output Swing from Supply Rail | VOL, VOH | 5 | mV | RLOAD = 100 kΩ | 8 | ||
| Supply Voltage | VDD | 1.8 | 6 | V | 8 | ||
| Quiescent Current per Amplifier | IQ | 600 | 950 | nA | 8 | ||
| Input Offset Voltage Drift | VOS TC | 0.5 | μV/°C | 8 | |||
| Input Bias Current | IB | 1 | pA | TA = 27°C | 8 | ||
| Input Bias Current | IB | 20 | pA | TA = 85°C | 8 | ||
| Input Bias Current | IB | 100 | pA | TA = 125°C | 8 | ||
| Input Offset Current | IOS | 1 | pA | 8 | |||
| Input Voltage Noise | Vn | 6.5 | μVP-P | f = 0.1 Hz to 10 Hz | 8 | ||
| Input Voltage Noise Density | en | 170 | nV/√Hz | f = 1 kHz | 8 | ||
| Input Resistance | RIN | 1 | TΩ | 8 | |||
| Input Capacitance | CIN | 2.9 | pF | Differential mode | 8 | ||
| Input Capacitance | CIN | 5 | pF | Common mode | 8 | ||
| Closed-Loop Output Impedance | ROUT | 0.4 | Ω | G = 1, f = 1 kHz, IOUT = 0 | 8 | ||
| Open-Loop Output Impedance | RO | 2.6 | Ω | f = 1 kHz, IOUT = 0 | 8 | ||
| Output Short-Circuit Current | ISC | 20 | mA | Sink or source current | 8 | ||
| Phase Margin | PM | 61 | ° | RLoad = 100 kΩ, CLOAD = 60 pF | 8 | ||
| Gain Margin | GM | 10 | dB | RLoad = 100 kΩ, CLoad = 60 pF | 8 | ||
| Gain-Bandwidth Product | GBWP | 18 | kHz | f = 1 kHz | 8 | ||
| Settling Time, 0.1% | tS | 0.25 | ms | Settling Time, 1.5 V to 3.5 V, Unity Gain | 8 | ||
| Settling Time, 0.01% | tS | 0.253 | ms | Settling Time, 1.5 V to 3.5 V, Unity Gain | 8 | ||
| Settling Time, 0.1% | tS | 0.035 | ms | Settling Time, 2.45 V to 2.55 V, Unity Gain | 8 | ||
| Settling Time, 0.01% | tS | 0.038 | ms | Settling Time, 2.45 V to 2.55 V, Unity Gain | 8 | ||
| Slew Rate | SR | 10 | mV/μs | AV = 1, VOut = 1.5 V to 3.5 V, CLOAD = 60 pF, RLOAD = 100 kΩ | 8 |
CAD (KiCad official)
- Symbol:
TP2122-SR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tp2122-sr-etched.step/tp2122-sr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tp2122-sr.step/tp2122-sr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (28 pp, sha256
88fb863dd90ac93f, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).