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TP181C50S5-A

Public Made by Adom

by adom

TECH PUBLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs tp181c50s5-a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers tp181c50s5-a: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json tp181c50s5-a: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 23h ago
README.md tp181c50s5-a: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tp181c50s5-a-etched.fit.json tp181c50s5-a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tp181c50s5-a-etched.glb tp181c50s5-a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tp181c50s5-a-etched.step tp181c50s5-a: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tp181c50s5-a.glb Publish 0.1.0 · Ray 1mo ago
tp181c50s5-a.kicad_mod Publish 0.1.0 · Ray 1mo ago
tp181c50s5-a.kicad_sym Publish 0.1.0 · Ray 1mo ago
tp181c50s5-a.lbr Publish 0.1.0 · Ray 1mo ago
tp181c50s5-a.step Publish 0.1.0 · Ray 1mo ago

TP181C50S5-A

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TP181C50S5-A from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated input supply voltage. Operating range up to 18V (absolute max 18V). Bypass to GND with a 1µF ceramic capacitor close to the pin.
2 GND power_in Device ground reference. Connect to the system ground plane.
3 CE input Chip Enable (active-high). VCEH ≥ 1.3V enables the regulator; VCEL ≤ 0.7V disables it and puts the device into low-power shutdown. When CE=0 an internal ~500Ω auto-discharge resistor pulls VOUT to ground.
4 NC unconnected No internal connection. Leave floating or tie to GND.
5 VOUT power_out Regulated 5.0V output (typ, 4.9V min / 5.1V max at IOUT=30mA). Supports up to 300mA continuous with foldback short-circuit protection (ISHORT≈40mA, ILIMIT≈500mA). Requires a 1µF ceramic output capacitor for stability.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TP181C50S5-A
  • TP181C50S5-AD6
  • TP181C50S5-AT3
  • TP181C50S5-AS3L

CAD (KiCad official)

  • Symbol: TP181C50S5-A
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tp181c50s5-a-etched.step / tp181c50s5-a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp181c50s5-a.step / tp181c50s5-a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (7 pp, sha256 48f531e81160802a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF