Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TP172CADJS5

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TP172CADJS5 from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage. Operating range 1.2 V to 5.5 V (absolute max 6.5 V vs GND). A 1 uF input capacitor to GND is recommended for stability.
2 GND power_in Device ground reference. Return path for supply and internal control circuitry.
3 EN input Enable control input. VIH >= 2 V (max) enables the regulator; VIL <= 0.6 V (min falling) forces shutdown. EN input current ~10 nA typ at 5 V. Absolute max -0.3 V to 6 V vs GND. Do not float.
4 SNS input Feedback (sense) input for the internal error amplifier; internal reference VFB = 0.8 V. Connect to an external resistor divider from VOUT to set the output: R1 = R2 * (VOUT/0.8V - 1), with R2 < 24 kOhm. SNS input current ~0.7 uA typ.
5 VOUT power_out Regulator output. Delivers up to 600 mA with typical dropout of 0.32 V at 600 mA / VOUT=3.3 V. Stable with a >=1 uF ceramic or tantalum output capacitor. When EN=0, an internal ~100 Ohm discharge resistance pulls VOUT down.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TP172CADJS5

CAD (KiCad official)

  • Symbol: TP172CADJS5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tp172cadjs5-etched.step / tp172cadjs5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp172cadjs5.step / tp172cadjs5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (9 pp, sha256 32123534387edee0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF