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TP1562AL1-SR

3PEAK · Operational Amplifier · SOIC-8

TP1562AL1-SR from 3PEAK, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Out A output Output of amplifier A, which swings rail-to-rail to within 10mV of either rail and should not be forced more than 0.5V beyond either supply.
2 -In A input Inverting input of amplifier A; the common-mode input range is (V-) - 0.1 V to (V+) + 0.1 V, and input current must be limited to less than 10mA if the input extends more than 300mV beyond the supply.
3 +In A input Non-inverting input of amplifier A; the common-mode input range is (V-) - 0.1 V to (V+) + 0.1 V, and input current must be limited to less than 10mA if the input extends more than 300mV beyond the supply.
4 -Vs power_in Negative power supply; total supply voltage (+Vs)-(-Vs) is 2.5 V to 6.0 V with an absolute maximum of 7 V.
5 +In B input Non-inverting input of amplifier B; the common-mode input range is (V-) - 0.1 V to (V+) + 0.1 V, and input current must be limited to less than 10mA if the input extends more than 300mV beyond the supply.
6 -In B input Inverting input of amplifier B; the common-mode input range is (V-) - 0.1 V to (V+) + 0.1 V, and input current must be limited to less than 10mA if the input extends more than 300mV beyond the supply.
7 Out B output Output of amplifier B, which swings rail-to-rail to within 10mV of either rail and should not be forced more than 0.5V beyond either supply.
8 +Vs power_in Positive power supply; total supply voltage (+Vs)-(-Vs) is 2.5 V to 6.0 V with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer 3PEAK
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VS 2.5 6 V 5
Input Offset Voltage VOS -3 3 mV VCM = 0V to 3V 5
Maximum Output Voltage Swing VOH, VOL 3 15 mV RLOAD = 10kΩ 5
Open-loop Voltage Gain Av 80 100 dB RLOAD = 10kΩ 5
Power Supply Rejection Ratio PSRR 75 90 dB 5
Common Mode Rejection Ratio CMRR 70 100 dB VCM = 0V to 2.5V 5
Short-Circuit Current ISC 90 100 mA 5
Quiescent Current per Amplifier IQ 600 900 μA 5
Input Offset Voltage Drift VOS TC 1 μV/°C TA = -40°C to 125°C 5
Input Bias Current IB 1 pA TA = 25 °C 5
Input Bias Current IB 25 pA TA = 85 °C 5
Input Offset Current IOS 1 pA 5
Input Capacitance Differential Mode CIN 8 pF Differential Mode 5
Input Capacitance Common Mode CIN 7 pF Common Mode 5
Channel Separation Xtalk 110 dB f = 1kHz, RL = 2kΩ 5
Gain-Bandwidth Product GBW 6 MHz 5
Slew Rate SR 4.5 V/μs AV = 1, VOUT = 1.5V to 3.5V, CLOAD = 60pF, RLOAD = 1kΩ 5
Settling Time, 0.1% tS 0.8 μs AV = 1, 2V Step, CLOAD = 60pF, RLOAD = 1kΩ 5
Settling Time, 0.01% tS 1 μs 5
Phase Margin PM 60 ° RLOAD = 1kΩ, CLOAD = 60pF 5
Gain Margin GM 15 dB RLOAD = 1kΩ, CLOAD = 60pF 5
Input Voltage Noise EN 8 μVPP f = 0.1Hz to 10Hz 5
Input Voltage Noise Density eN 19 nV/√Hz f = 1kHz 5
Input Current Noise iN 2 fA/√Hz f = 1kHz 5
Total Harmonic Distortion and Noise THD+N 0.003 % f = 1kHz, AV =1, RL = 2kΩ, VOUT = 1Vp-p 5
Supply Voltage (+VS)-(-VS) 7 V 4
Differential Input Voltage -7 7 V 4
Input Current +IN, -IN -10 10 mA Note 2 4
Maximum Junction Temperature 150 °C 4
Operating Temperature Range -40 125 °C 4
Storage Temperature Range -65 150 °C 4
Lead Temperature (Soldering) 260 °C 10 sec 4
Human Body Model ESD minimum level HBM 8 kV MIL-STD-883H Method 3015.8 4
Charged Device Model ESD minimum level CDM 2 kV JEDEC-EIA/JESD22-C101E 4
Thermal Resistance Junction-to-Ambient, 8-Pin SOIC θJA 158 °C/W 4
Thermal Resistance Junction-to-Case, 8-Pin SOIC θJC 43 °C/W 4

CAD (KiCad official)

  • Symbol: TP1562AL1-SR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tp1562al1-sr-etched.step / tp1562al1-sr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp1562al1-sr.step / tp1562al1-sr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK datasheet (17 pp, sha256 7fd31b63dd5cdb1a, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF