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TP142C33S5

Public Made by Adom

by adom

TECH PUBLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tp142c33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tp142c33s5: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 15d ago
tp142c33s5-etched.fit.json tp142c33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp142c33s5-etched.glb tp142c33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp142c33s5-etched.step tp142c33s5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tp142c33s5.glb Publish 0.1.0 · Ray 1mo ago
tp142c33s5.kicad_mod Publish 0.1.0 · Ray 1mo ago
tp142c33s5.kicad_sym Publish 0.1.0 · Ray 1mo ago
tp142c33s5.lbr Publish 0.1.0 · Ray 1mo ago
tp142c33s5.step Publish 0.1.0 · Ray 1mo ago

TP142C33S5

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TP142C33S5 from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output of the LDO. Fixed 3.3V nominal (±2%) for the '33' option. Delivers up to 450mA; requires a 1uF ceramic or tantalum output capacitor for stability.
2 GND power_in Ground reference. Common return for VIN, VOUT and EN. Quiescent GND current is 2uA typical at no load.
3 EN input Enable control input. VIH ≥ 1.0V enables the regulator; VIL ≤ 0.4V places it into shutdown (ISD ≤ 0.5uA). Input current 10nA typ / 100nA max at VEN=5V. Absolute max 6V. Do not leave floating.
4 NC unconnected No internal connection. May be left floating or tied to GND for improved routing.
5 VIN power_in Supply input. Operating range 1.2V to 5.5V (absolute max 6.5V to GND). Requires a 1uF ceramic bypass capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TP142C33S5
  • TP142C33S5S3
  • TP142C33S5D4
  • TP142C33S5D6

CAD (KiCad official)

  • Symbol: TP142C33S5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tp142c33s5-etched.step / tp142c33s5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp142c33s5.step / tp142c33s5.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tp142c33s5.step 85 KB You want the bare part, or you mark your own boards.
tp142c33s5-etched.step 2.1 MB You want the part with TP142C33S5 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 510 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (12 pp, sha256 cd6481df1e4a56a0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF