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TN2540N3-G

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Microchip Tech MOSFETs, TO-92-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistortn2540n3-gfactory-2.0.0extractor-text

Verified TN2540N3-G

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TN2540N3-G · TO-92-3 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 14-page datasheet
  • ✓distributor: lcsc C632582, digikey TN2540N3-G-ND, mouser 689-TN2540N3-G
  • ✓family: TO-92_Inline
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-591mbbpo/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tn2540n3-g.kicad_sym✓ tn2540n3-g.kicad_mod✓ tn2540n3-g.step
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Ray Publish 0.1.0 a94795b 5d ago

TN2540N3-G

Microchip Tech · MOSFETs · TO-92-3

TN2540N3-G from Microchip Tech, in a TO-92-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the N-channel enhancement-mode vertical DMOS FET; the datasheet gives Gate-to-Source voltage limited to ±20V (absolute maximum).
2 Gate input Gate terminal of the TN2540, with Gate-to-Source voltage limited to ±20V (absolute maximum) and Gate Threshold Voltage VGS(th) of 0.6 V minimum to 2 V maximum at VGS = VDS, ID = 1 mA.
3 Drain passive Drain terminal of the N-channel enhancement-mode vertical DMOS FET, with Drain-to-Source Breakdown Voltage BVDSS of 400 V minimum at VGS = 0V, ID = 100 µA.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TO-92-3
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate-to-Source Voltage VGS -20 20 V 2
Operating Ambient Temperature TA -55 150 °C 2
Storage Temperature TS -55 150 °C 2
Drain-to-Source Breakdown Voltage BVDSS 400 V VGS = 0V, ID = 100 µA 2
Gate Threshold Voltage VGS(th) 0.6 2 V VGS = VDS, ID = 1 mA 2
Change in VGS(th) with Temperature ΔVGS(th) -2.5 -4 mV/°C VGS = VDS, ID = 1 mA (Note 1) 2
Gate Body Leakage Current IGSS 100 nA VGS = ±20V, VDS = 0V 2
Zero-Gate Voltage Drain Current IDSS 10 µA VGS = 0V, VDS = Maximum rating 2
Zero-Gate Voltage Drain Current at 125°C IDSS 1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) 2
On-State Drain Current ID(ON) 0.3 0.5 A VGS = 4.5V, VDS = 25V 2
On-State Drain Current ID(ON) 0.75 1 A VGS = 10V, VDS = 25V 2
Static Drain-to-Source On-State Resistance RDS(ON) 8 12 Ω VGS = 4.5V, ID = 150 mA 2
Change in RDS(ON) with Temperature ΔRDS(ON) 0.75 %/°C VGS = 10V, ID = 500 mA (Note 1) 2
Forward Transconductance GFS 125 200 mmho VDS = 25V, ID = 100 mA 3
Input Capacitance CISS 95 125 pF VGS = 0V, VDS = 25V, f = 1 MHz 3
Common-Source Output Capacitance COSS 20 70 pF 3
Reverse Transfer Capacitance CRSS 10 25 pF 3
Turn-On Delay Time td(ON) 20 ns VDD = 25V, ID = 1A, RGEN = 25Ω 3
Rise Time tr 15 ns 3
Turn-Off Delay Time td(OFF) 25 ns 3
Fall Time tf 20 ns 3
Diode Forward Voltage Drop VSD 1.8 V VGS = 0V, ISD = 200 mA (Note 1) 3
Operating Ambient Temperature TA -55 150 °C 3
Storage Temperature TS -55 150 °C 3
Continuous Drain Current, 3-lead TO-92 ID 175 mA Continuous, limited by maximum rated TJ (Note 1) 3
Pulsed Drain Current, 3-lead TO-92 ID 2 A Pulsed 3
Power Dissipation at TA = 25°C, 3-lead TO-92 1 W TA = 25°C 3
Reverse Drain Current, 3-lead TO-92 IDR 175 mA Note 1 3
Reverse Drain Pulsed Current, 3-lead TO-92 IDRM 2 A 3
Thermal Resistance, Junction-to-Ambient, 3-lead TO-92 θJA 132 °C/W 3
Reverse Recovery Time trr 300 ns VGS = 0V, ISD = 1A 3

CAD (KiCad official)

  • Symbol: TN2540N3-G
  • Footprint: Package_TO_SOT_THT:TO-92_Inline
  • 3D model: TO-92-3 (KiCad packages3D, STEP)
  • 3D model files: tn2540n3-g-etched.step / tn2540n3-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tn2540n3-g.step / tn2540n3-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (14 pp, sha256 7481d72821d5ce4f, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF