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TN1205H-6G-TR

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STMicroelectronics Thyristors (SCR)/Modules, D2PAK. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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TN1205H-6G-TR

STMicroelectronics · Thyristors (SCR)/Modules · D2PAK

TN1205H-6G-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Cathode of the SCR; carries the on-state current (IT(RMS) 12 A at Tc = 136 °C) out of the device.
2 A passive Anode of the SCR, also connected to the tab; blocks VDRM/VRRM up to 600 V.
3 G input Gate trigger input; IGT 2 to 5 mA (VD = 12 V, RL = 33 Ω), VGT max 1.3 V, peak reverse gate voltage max 5 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
On-state rms current IT(RMS) 12 A 180° conduction angle, Tc = 136 °C 2
Average on-state current IT(AV) 7.6 A 180° conduction angle 2
Non repetitive surge peak on-state current ITSM 126 A tp = 8.3 ms, Tj = 25 °C 2
Non repetitive surge peak on-state current ITSM 120 A tp = 10 ms 2
I2t value for fusing I2t 72 A2S tp = 10 ms 2
Critical rate of rise of on-state current dI/dt 100 A/µs IG = 2 x IGT, tr ≤ 100 ns, F = 60 Hz, Tj = 150 °C 2
Peak gate current IGM 4 A tp = 20 µs, Tj = 150 °C 2
Average gate power dissipation PG(AV) 1 W Tj = 150 °C 2
Maximum peak reverse gate voltage VRGM 5 V 2
Storage junction temperature range Tstg -40 150 °C 2
Operating junction temperature range Tj -40 150 °C 2
Maximum lead temperature for soldering TL 260 °C during 10 s 2
Gate trigger current IGT 2 5 mA VD = 12 V, RL = 33 Ω 2
Gate trigger voltage VGT 1.3 V VD = VDRM, RL = 3.3 kΩ 2
Gate non-trigger voltage VGD 0.2 V VD = VDRM, RL = 3.3 kΩ 2
Holding current IH 20 mA IT = 500 mA, gate open 2
Latching current IL 40 mA IG = 1.2 IGT 2
Critical rate of rise of off-state voltage dV/dt 200 V/µs VD = 67% VDRM, gate open, Tj = 125 °C 2
Critical rate of rise of off-state voltage dV/dt 100 V/µs VD = 67% VDRM, gate open, Tj = 150 °C 2
On-state voltage VT 1.6 V ITM = 24 A, tp = 380 µs, Tj = 25 °C 3
Junction to case thermal resistance (DC) Rth(j-c) 1.3 °C/W DC 3
Junction to ambient thermal resistance (DC), D2PAK Rth(j-a) 45 °C/W S = 1 cm² copper surface under tab, D2PAK 3

CAD (KiCad official)

  • Symbol: TN1205H-6G-TR
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: tn1205h-6g-tr-etched.step / tn1205h-6g-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tn1205h-6g-tr.step / tn1205h-6g-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (10 pp, sha256 f7380cfa1bf012d7, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF