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TN0104N3-G

Microchip Tech · MOSFETs · TO-92

TN0104N3-G from Microchip Tech, in a TO-92. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal of the N-channel enhancement-mode vertical DMOS FET (TO-92 Table 3-1).
2 Gate input Gate terminal with threshold VGS(th) of 0.6V to 1.6V at ID = 500 µA and absolute maximum gate-to-source voltage of ±20V.
3 Drain passive Drain terminal with minimum drain-to-source breakdown voltage BVDSS of 40V at VGS = 0V, ID = 1 mA.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TO-92
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Breakdown Voltage BVDSS 40 V VGS = 0V, ID = 1 mA 2
Gate Threshold Voltage VGS(th) 0.6 1.6 V VGS = VDS, ID = 500 µA 2
Change in VGS(th) with Temperature ΔVGS(th) -3.8 -5 mV/°C VGS = VDS, ID = 1 mA (Note 1) 2
Gate Body Leakage Current IGSS 0.1 100 nA VGS = ±20V, VDS = 0V 2
Zero-Gate Voltage Drain Current IDSS 1 µA VGS = 0V, VDS = Maximum rating 2
Zero-Gate Voltage Drain Current (125°C) IDSS 100 µA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) 2
On-State Drain Current ID(ON) 0.5 1.1 A VGS = 5V, VDS = 20V 2
On-State Drain Current ID(ON) 2 2.6 A VGS = 10V, VDS = 20V 2
Static Drain-to-Source On-State Resistance RDS(ON) 2.3 2.5 Ω VGS = 5V, ID = 250 mA 2
Static Drain-to-Source On-State Resistance (TO-92) RDS(ON) 1.5 1.8 Ω VGS = 10V, ID = 1A 2
Change in RDS(ON) with Temperature ΔRDS(ON) 0.7 1 %/°C VGS = 10V, ID = 1A (Note 1) 2
Forward Transconductance GFS 340 450 mmho VDS = 20V, ID = 500 mA 3
Input Capacitance CISS 70 pF VGS = 0V, VDS = 20V, f = 1 MHz 3
Common-Source Output Capacitance COSS 50 pF VGS = 0V, VDS = 20V, f = 1 MHz 3
Reverse Transfer Capacitance CRSS 15 pF VGS = 0V, VDS = 20V, f = 1 MHz 3
Turn-On Delay Time td(ON) 3 5 ns VDD = 20V, ID = 1A, RGEN = 25Ω 3
Rise Time tr 7 8 ns VDD = 20V, ID = 1A, RGEN = 25Ω 3
Turn-Off Delay Time td(OFF) 6 9 ns VDD = 20V, ID = 1A, RGEN = 25Ω 3
Fall Time tf 5 8 ns VDD = 20V, ID = 1A, RGEN = 25Ω 3
Diode Forward Voltage Drop (TO-92) VSD 1.2 1.8 V VGS = 0V, ISD = 1A (Note 1) 3
Gate-to-Source Voltage VGS -20 20 V 2
Operating Ambient Temperature TA -55 150 °C 2
Storage Temperature TS -55 150 °C 2
Operating Ambient Temperature TA -55 150 °C 3
Storage Temperature TS -55 150 °C 3
Thermal Resistance, 3-lead TO-92 θJA 132 °C/W 3-lead TO-92 3
Continuous Drain Current (TO-92) ID 450 mA 3-lead TO-92, limited by maximum rated TJ 3
Pulsed Drain Current (TO-92) ID 2.4 A 3-lead TO-92, pulsed 3
Power Dissipation (TO-92) PD 1 W TA = 25°C, 3-lead TO-92 3
Reverse Drain Current (TO-92) IDR 450 mA 3-lead TO-92 3
Pulsed Reverse Drain Current (TO-92) IDRM 2.4 A 3-lead TO-92 3
On-State Drain Current ID(ON) 0.35 A VGS = 3V, VDS = 20V 2
Static Drain-to-Source On-State Resistance RDS(ON) 5 Ω VGS = 3V, ID = 50 mA 2
Reverse Recovery Time trr 300 ns VGS = 0V, ISD = 1A 3

CAD (KiCad official)

  • Symbol: TN0104N3-G
  • Footprint: Package_TO_SOT_THT:TO-92_Inline
  • 3D model: TO-92 (KiCad packages3D, STEP)
  • 3D model files: tn0104n3-g-etched.step / tn0104n3-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tn0104n3-g.step / tn0104n3-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (14 pp, sha256 f4e5d4deec41795e, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF