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TMUX4051PWR

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Texas Instruments Analog Switches, Multiplexers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tmux4051pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers tmux4051pwr: viewers · Ray 28d ago
package.json Publish 0.1.0 · Ray 28d ago
page.json tmux4051pwr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 23h ago
README.md tmux4051pwr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
tmux4051pwr-etched.fit.json tmux4051pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tmux4051pwr-etched.glb tmux4051pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tmux4051pwr-etched.step tmux4051pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
tmux4051pwr.glb Publish 0.1.0 · Ray 28d ago
tmux4051pwr.kicad_mod Publish 0.1.0 · Ray 28d ago
tmux4051pwr.kicad_sym Publish 0.1.0 · Ray 28d ago
tmux4051pwr.lbr Publish 0.1.0 · Ray 28d ago
tmux4051pwr.step Publish 0.1.0 · Ray 28d ago

TMUX4051PWR

Texas Instruments · Analog Switches, Multiplexers · TSSOP-16

TMUX4051PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S4 bidirectional Source pin 4. Analog signal path to/from the common drain D when addressed by A[2:0]=100 with EN low. Bidirectional analog signal, VSS to VDD range.
2 S6 bidirectional Source pin 6. Analog signal path to/from the common drain D when addressed by A[2:0]=110 with EN low. Bidirectional analog signal, VSS to VDD range.
3 D bidirectional Drain pin (common). Common node of the 8:1 mux. Bidirectional analog signal, VSS to VDD range.
4 S7 bidirectional Source pin 7. Analog signal path to/from the common drain D when addressed by A[2:0]=111 with EN low. Bidirectional analog signal, VSS to VDD range.
5 S5 bidirectional Source pin 5. Analog signal path to/from the common drain D when addressed by A[2:0]=101 with EN low. Bidirectional analog signal, VSS to VDD range.
6 EN input Active-low enable (EN). When high, all internal switches are OFF. When low, the A[2:0] address selects which source pin connects to D. 1.8V-compatible logic input.
7 VSS power_in Negative power supply, most negative supply potential. Bypass with 0.1µF-10µF decoupling capacitor between VSS and GND. For single-supply operation, tie to GND.
8 GND power_in Ground (0V) reference.
9 A2 input Address line 2 (MSB). Digital select input for the 1-of-8 decoder that steers a source pin to D. 1.8V-compatible logic input.
10 A1 input Address line 1. Digital select input for the 1-of-8 decoder that steers a source pin to D. 1.8V-compatible logic input.
11 A0 input Address line 0 (LSB). Digital select input for the 1-of-8 decoder that steers a source pin to D. 1.8V-compatible logic input.
12 S3 bidirectional Source pin 3. Analog signal path to/from the common drain D when addressed by A[2:0]=011 with EN low. Bidirectional analog signal, VSS to VDD range.
13 S0 bidirectional Source pin 0. Analog signal path to/from the common drain D when addressed by A[2:0]=000 with EN low. Bidirectional analog signal, VSS to VDD range.
14 S1 bidirectional Source pin 1. Analog signal path to/from the common drain D when addressed by A[2:0]=001 with EN low. Bidirectional analog signal, VSS to VDD range.
15 S2 bidirectional Source pin 2. Analog signal path to/from the common drain D when addressed by A[2:0]=010 with EN low. Bidirectional analog signal, VSS to VDD range.
16 VDD power_in Positive power supply, most positive supply potential. Single-supply range 5V-24V; dual-supply up to ±12V. Bypass with 0.1µF-10µF decoupling capacitor between VDD and GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • TMUX4051PWR
  • TMUX4051PWRDYY
  • TMUX4051PWRDYYR
  • TMUX4051PWRBQB
  • TMUX4051PWRBQBR

CAD (KiCad official)

  • Symbol: TMUX4051PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tmux4051pwr-etched.step / tmux4051pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmux4051pwr.step / tmux4051pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 260f469c4a92ee9e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF