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TMUX1308AQPWRQ1
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTMUX1308AQPWRQ1
Texas Instruments · Analog Switches, Multiplexers · TSSOP-16
TMUX1308AQPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S4 | bidirectional | Source pin 4 of the 8:1 mux; the signal path can be an input or output. |
| 2 | S6 | bidirectional | Source pin 6 of the 8:1 mux; the signal path can be an input or output. |
| 3 | D | bidirectional | Common drain pin of the 8:1 mux; the signal path can be an input or output. |
| 4 | S7 | bidirectional | Source pin 7 of the 8:1 mux; the signal path can be an input or output. |
| 5 | S5 | bidirectional | Source pin 5 of the 8:1 mux; the signal path can be an input or output. |
| 6 | EN | input | Active-low enable input: when high all switches are turned off, and when low the A[2:0] address inputs select the on switch. |
| 7 | N.C. | unconnected | Not internally connected. |
| 8 | GND | power_in | Ground (0 V) reference. |
| 9 | A2 | input | Address line 2, which sets the switch configuration as listed in Section 8.5. |
| 10 | A1 | input | Address line 1, which sets the switch configuration as listed in Section 8.5. |
| 11 | A0 | input | Address line 0, which sets the switch configuration as listed in Section 8.5. |
| 12 | S3 | bidirectional | Source pin 3 of the 8:1 mux; the signal path can be an input or output. |
| 13 | S0 | bidirectional | Source pin 0 of the 8:1 mux; the signal path can be an input or output. |
| 14 | S1 | bidirectional | Source pin 1 of the 8:1 mux; the signal path can be an input or output. |
| 15 | S2 | bidirectional | Source pin 2 of the 8:1 mux; the signal path can be an input or output. |
| 16 | VDD | power_in | Positive power supply, the most positive supply potential; for reliable operation connect a 0.1 µF to 10 µF decoupling capacitor between VDD and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| On-state switch resistance (1.8V) | RON | 650 | 1700 | Ω | VS = 0V to VDD, ISD = 0.5mA, VDD = 1.8V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance (2.5V) | RON | 230 | 670 | Ω | VS = 0V to VDD, ISD = 0.5mA, VDD = 2.5V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance (3.3V) | RON | 120 | 370 | Ω | VS = 0V to VDD, ISD = 0.5mA, VDD = 3.3V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance (5V) | RON | 75 | 270 | Ω | VS = 0V to VDD, ISD = 0.5mA, VDD = 5V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance matching between inputs (1.8V) | ΔRON | 10 | 45 | Ω | VS = VDD/2, ISD = 0.5mA, VDD = 1.8V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance matching between inputs (2.5V) | ΔRON | 3 | 22 | Ω | VS = VDD/2, ISD = 0.5mA, VDD = 2.5V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance matching between inputs (3.3V) | ΔRON | 2 | 15 | Ω | VS = VDD/2, ISD = 0.5mA, VDD = 3.3V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| On-state switch resistance matching between inputs (5V) | ΔRON | 1 | 14 | Ω | VS = VDD/2, ISD = 0.5mA, VDD = 5V; typ at 25°C, max at TA = -40°C to 125°C | 10 | |
| Source off-state leakage current (1.8V) | IS(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 1.8V; TA = -40°C to 125°C | 10 | |
| Source off-state leakage current (2.5V) | IS(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 2.5V; TA = -40°C to 125°C | 10 | |
| Source off-state leakage current (3.3V) | IS(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 3.3V; TA = -40°C to 125°C | 10 | |
| Source off-state leakage current (5V) | IS(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 5V; TA = -40°C to 125°C | 10 | |
| Drain off-state leakage current, common drain pin (1.8V) | ID(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 1.8V; TA = -40°C to 125°C | 10 | |
| Drain off-state leakage current, common drain pin (2.5V) | ID(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 2.5V; TA = -40°C to 125°C | 10 | |
| Drain off-state leakage current, common drain pin (3.3V) | ID(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 3.3V; TA = -40°C to 125°C | 10 | |
| Drain off-state leakage current, common drain pin (5V) | ID(OFF) | -800 | 800 | nA | Switch off, VD = 0.8 x VDD/ 0.2 x VDD, VS = 0.2 x VDD/ 0.8 x VDD, VDD = 5V; TA = -40°C to 125°C | 10 | |
| Source off capacitance (1.8V) | CSOFF | 2 | 14 | pF | VS = VDD/2, f = 1MHz, VDD = 1.8V | 10 | |
| Source off capacitance (2.5V) | CSOFF | 2 | 14 | pF | VS = VDD/2, f = 1MHz, VDD = 2.5V | 10 | |
| Source off capacitance (3.3V) | CSOFF | 2 | 14 | pF | VS = VDD/2, f = 1MHz, VDD = 3.3V | 10 | |
| Source off capacitance (5V) | CSOFF | 2 | 14 | pF | VS = VDD/2, f = 1MHz, VDD = 5V | 10 | |
| Drain off capacitance (1.8V) | CDOFF | 7 | 37 | pF | VS = VDD/2, f = 1MHz, VDD = 1.8V | 10 | |
| Drain off capacitance (2.5V) | CDOFF | 7 | 37 | pF | VS = VDD/2, f = 1MHz, VDD = 2.5V | 10 | |
| Drain off capacitance (3.3V) | CDOFF | 7 | 37 | pF | VS = VDD/2, f = 1MHz, VDD = 3.3V | 10 | |
| Drain off capacitance (5V) | CDOFF | 7 | 37 | pF | VS = VDD/2, f = 1MHz, VDD = 5V | 10 | |
| On capacitance (1.8V) | CSON/CDON | 11 | 40 | pF | VS = VDD/2, f = 1MHz, VDD = 1.8V | 10 | |
| On capacitance (2.5V) | CSON/CDON | 11 | 40 | pF | VS = VDD/2, f = 1MHz, VDD = 2.5V | 10 | |
| On capacitance (3.3V) | CSON/CDON | 11 | 40 | pF | VS = VDD/2, f = 1MHz, VDD = 3.3V | 10 | |
| On capacitance (5V) | CSON/CDON | 11 | 40 | pF | VS = VDD/2, f = 1MHz, VDD = 5V | 10 | |
| VDD supply current (1.8V) | IDD | 1 | 1.2 | µA | Logic inputs = 0V or VDD, VDD = 1.8V; max at TA = -40°C to 125°C | 10 | |
| VDD supply current (2.5V) | IDD | 1 | 1.5 | µA | Logic inputs = 0V or VDD, VDD = 2.5V; max at TA = -40°C to 125°C | 10 | |
| VDD supply current (3.3V) | IDD | 1 | 2 | µA | Logic inputs = 0V or VDD, VDD = 3.3V; max at TA = -40°C to 125°C | 10 | |
| VDD supply current (5V) | IDD | 1 | 3 | µA | Logic inputs = 0V or VDD, VDD = 5V; max at TA = -40°C to 125°C | 10 | |
| Input logic high (1.8V) | VIH | 0.95 | 5.5 | V | VDD = 1.8V; TA = -40°C to 125°C | 11 | |
| Input logic high (2.5V) | VIH | 1.1 | 5.5 | V | VDD = 2.5V; TA = -40°C to 125°C | 11 | |
| Input logic high (3.3V) | VIH | 1.15 | 5.5 | V | VDD = 3.3V; TA = -40°C to 125°C | 11 | |
| Input logic high (5V) | VIH | 1.25 | 5.5 | V | VDD = 5V; TA = -40°C to 125°C | 11 | |
| Input logic low (1.8V) | VIL | 0 | 0.6 | V | VDD = 1.8V; TA = -40°C to 125°C | 11 | |
| Input logic low (2.5V) | VIL | 0 | 0.7 | V | VDD = 2.5V; TA = -40°C to 125°C | 11 | |
| Input logic low (3.3V) | VIL | 0 | 0.8 | V | VDD = 3.3V; TA = -40°C to 125°C | 11 | |
| Input logic low (5V) | VIL | 0 | 0.95 | V | VDD = 5V; TA = -40°C to 125°C | 11 | |
| Logic high input leakage current | IIH | 1 | uA | VLOGIC = 1.8V or VDD; all supply voltages; TA = -40°C to 125°C | 11 | ||
| Logic low input leakage current | IIL | -1 | uA | VLOGIC = 0V; all supply voltages; TA = -40°C to 125°C | 11 | ||
| Logic input capacitance | CIN | 1 | 2 | pF | VLOGIC = 0V, 1.8V, VDD; f = 1MHz | 11 | |
| Supply voltage (absolute maximum) | VDD | -0.5 | 6 | V | Over operating free-air temperature range; voltages with respect to GND | 8 | |
| Logic control input pin voltage (absolute maximum) | VSEL or VEN | -0.5 | 6 | V | Logic control input pins EN, A0, A1, A2; over operating free-air temperature range | 8 | |
| Source or drain voltage (absolute maximum) | VS or VD | -0.5 | V | Sx, D pins; printed maximum is VDD+1.0 V | 8 | ||
| Logic control input pin current | ISEL or IEN | -30 | 30 | mA | EN, A0, A1, A2 pins | 8 | |
| Continuous current through switch (absolute maximum, -40°C to +85°C) | IS or ID (CONT) | -50 | 50 | mA | Sx, D pins; TA = -40°C to +85°C | 8 | |
| Continuous current through switch (absolute maximum, -40°C to +125°C) | IS or ID (CONT) | -25 | 25 | mA | Sx, D pins; TA = -40°C to +125°C | 8 | |
| Total power dissipation | Ptot | 500 | mW | TSSOP package; derates linearly above TA = 80°C by 7.2 mW/°C | 8 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 8 | ||
| Junction temperature | TJ | 150 | °C | 8 | |||
| Supply voltage (recommended) | VDD | 1.62 | 5.5 | V | Over operating free-air temperature range | 9 | |
| Logic control input pin voltage (recommended) | VSEL or VEN | 0 | 5.5 | V | EN, A0, A1, A2 pins; over operating free-air temperature range | 9 | |
| Continuous current through switch (recommended, -40°C to +85°C) | IS or ID (CONT) | -50 | 50 | mA | Sx, D pins; TA = -40°C to +85°C | 9 | |
| Continuous current through switch (recommended, -40°C to +125°C) | IS or ID (CONT) | -25 | 25 | mA | Sx, D pins; TA = -40°C to +125°C | 9 | |
| Ambient temperature (recommended) | TA | -40 | 125 | °C | Operating free-air temperature | 9 | |
| Junction-to-ambient thermal resistance (PW TSSOP) | RθJA | 139 | °C/W | TMUX1308-Q1, PW (TSSOP) package | 9 | ||
| Junction-to-case (top) thermal resistance (PW TSSOP) | RθJC(top) | 77.2 | °C/W | TMUX1308-Q1, PW (TSSOP) package | 9 | ||
| Junction-to-board thermal resistance (PW TSSOP) | RθJB | 84.2 | °C/W | TMUX1308-Q1, PW (TSSOP) package | 9 |
CAD (KiCad official)
- Symbol:
TMUX1308AQPWRQ1 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
tmux1308aqpwrq1-etched.step/tmux1308aqpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tmux1308aqpwrq1.step/tmux1308aqpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (52 pp, sha256
6cff7c1303c44ba5, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).