component
TMUX121NKGR
Public Made by Adomby adom
TI(德州仪器) Analog Switches, Multiplexers, UQFN-10(1.4x1.8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
| tmux121nkgr-etched.glb | 16d ago |
| tmux121nkgr-etched.step | 16d ago |
| tmux121nkgr-hero.glb | 16d ago |
| tmux121nkgr-hero.overlay.json | 16d ago |
| tmux121nkgr.glb | 16d ago |
| tmux121nkgr.kicad_mod | 16d ago |
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| tmux121nkgr.lbr | 16d ago |
| tmux121nkgr.step | 16d ago |
TMUX121NKGR
TI(德州仪器) · Analog Switches, Multiplexers · UQFN-10(1.4x1.8)
TMUX121NKGR from TI(德州仪器), in a UQFN-10(1.4x1.8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | bidirectional | Drain pin 1 can be an input or output of the switch and is connected to SA or SB according to the SEL/EN truth table, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 2 | D2 | bidirectional | Drain pin 2 can be an input or output of the switch and is connected to SA or SB according to the SEL/EN truth table, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | S2A | bidirectional | Source pin 2A can be an input or output and is selected as the path to D2 when SEL is low and EN is low, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 5 | S1A | bidirectional | Source pin 1A can be an input or output and is selected as the path to D1 when SEL is low and EN is low, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 6 | S2B | bidirectional | Source pin 2B can be an input or output and is selected as the path to D2 when SEL is high and EN is low, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 7 | S1B | bidirectional | Source pin 1B can be an input or output and is selected as the path to D1 when SEL is high and EN is low, with Sx/Dx recommended operating range of 0 to 3.6 V. |
| 8 | EN | input | Active-low enable input; when driven high all channels are disabled and Hi-Z, with logic input range of 0 to 3.6 V and VIH minimum of 1.4 V. |
| 9 | VDD | power_in | 3.3 V power supply with recommended range of 3.0 V to 3.6 V and absolute maximum of 4.0 V; when VDD is unpowered the I/O pins are forced to high impedance. |
| 10 | SEL | input | Switch logic control input that selects the signal path between SA and SB per the mux truth table, with logic input range of 0 to 3.6 V and VIL maximum of 0.4 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TI(德州仪器) |
| Package | UQFN-10(1.4x1.8) |
| Category | Interface |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD Supply voltage | VDD | -0.5 | 4 | V | 4 | ||
| Logic control input pin current (SEL, EN) | VEN or VSEL | -0.5 | 4 | V | 4 | ||
| Source or drain voltage (Sx, Dx) | VD or VS | -0.5 | 5.5 | V | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| VDD Power supply voltage | VDD | 3 | 3.3 | 3.6 | V | 4 | |
| Power supply voltage ramp time | VDDRAMP | 0.1 | 100 | ms | 4 | ||
| Source or drain voltage (Sx, Dx) | VD or VS | 0 | 3.6 | V | 4 | ||
| Logic control input pin current (SEL, EN) | VEN or VSEL | 0 | 3.6 | V | 4 | ||
| Source or drain continuous current (Sx, Dx) | IS or ID (cont) | 90 | mA | 4 | |||
| Operating free-air/ambient temperature | TA | -40 | 125 | °C | 4 | ||
| VDD quiescent supply current | IDDQ | 1.3 | 4 | µA | EN = VDD | 5 | |
| VDD supply current | IDD | 11 | 30 | µA | EN = 0 V | 5 | |
| On-resistance | RON | 3 | 5.4 | Ω | VS = 0 V, IS = -8 mA | 5 | |
| On-resistance | RON | 3.9 | 8 | Ω | VS = 2.4 V, IS = -8 mA | 5 | |
| Logic voltage high (EN, SEL) | VIH | 1.4 | 3.6 | V | 5 | ||
| Logic voltage low (EN, SEL) | VIL | 0 | 0.4 | V | 5 | ||
| Switch propagation delay (Sx to Dx or Dx to Sx) | tPD | 60 | 80 | ps | 5 | ||
| Intra-pair propagation delay skew for same channel | tSKEW_INTRA | 2 | 10 | ps | 5 | ||
| Inter-pair propagation delay skew between channels | tSKEW_INTER | 2 | 10 | ps | 5 | ||
| On-resistance mismatch between channels | ΔRON | 0.5 | Ω | VS = 0 V, IS = -8 mA | 5 | ||
| On-resistance flatness | RON FLAT | 1 | Ω | VS = 0 V and VS = 2.4 V; IS = -8 mA | 5 | ||
| Channel on leakage current (Sx, Dx) | IS(ON), ID(ON) | 2 | µA | Switch state is on, VD = VS = 3.6 V | 5 | ||
| Channel on leakage current (Sx, Dx) | IS(ON), ID(ON) | 0.2 | µA | Switch state is on, VD = VS = 0 V | 5 | ||
| Source off leakage current (Sx) | IS(OFF) | 2 | µA | Switch state is off, VS = 3.6 V | 5 | ||
| Drain off leakage current (Dx) | ID(OFF) | 2 | µA | Switch state is off, VD = 3.6 V | 5 | ||
| Powered-off leakage current (Sx, Dx) | I(POFF) | 10 | µA | VCC = 0 V, VD or VS = 3.6 V | 5 | ||
| Input leakage current (EN, SEL) | IIL | 0.2 | µA | 5 | |||
| Input leakage current (EN, SEL) | IIH | 1 | µA | 5 | |||
| Failsafe input leakage current (EN, SEL) | IIH | 10 | µA | VCC = 0 V, VEN or VSEL = 3.6 V | 5 | ||
| Transition time from control input (SEL) | tTRAN | 1 | µs | RL = 50 Ω, CL = 10 pF | 5 | ||
| Turn-on time from control input (EN) | tON | 16 | µs | RL = 50 Ω, CL = 10 pF | 5 | ||
| Turn-off time from control input (EN) | tOFF | 0.5 | µs | RL = 50 Ω, CL = 10 pF | 5 | ||
| -3-dB bandwidth | BW | 3 | GHz | 5 | |||
| Differential insertion loss | IL | -0.3 | dB | f = 10 MHz | 5 | ||
| Differential OFF isolation (D to SA/SB) | OISO | -56 | dB | f = 10 MHz | 5 | ||
| Differential cross-talk (SA to SB or SB to SA) | XTALK | -64 | dB | f = 10 MHz | 5 | ||
| On capacitance | CS(ON), CD(ON) | 1.7 | pF | f = 10 MHz | 5 | ||
| Junction-to-ambient thermal resistance - High K | RθJA | 225.9 | °C/W | High K | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 93.5 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 147.5 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 3.4 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 147.1 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TMUX121NKGR - Footprint:
Package_DFN_QFN:UQFN-10_1.4x1.8mm_P0.4mm - 3D model: UQFN-10(1.4x1.8) (KiCad packages3D, STEP)
- 3D model files:
tmux121nkgr-etched.step/tmux121nkgr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tmux121nkgr.step/tmux121nkgr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TI(德州仪器) datasheet (18 pp, sha256
9ee80a537f4a024e, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).