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TMS320LF2406APZA

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Texas Instruments Digital Signal Processors (DSP/DSC), LQFP-100(14x14). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TMS320LF2406APZA

Texas Instruments · Digital Signal Processors (DSP/DSC) · LQFP-100(14x14)

TMS320LF2406APZA from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TRST input JTAG test reset. Active-high test-mode enable with an internal pulldown; must be held low during normal operation. A 2.2 kΩ external pulldown is recommended in noisy environments.
2 TDIRB/IOPF4 bidirectional EVB general-purpose timer counting direction input. High = up-count, low = down-count. Reconfigurable as GPIO IOPF4; internal pullup.
3 VSS power_in Core digital ground reference (0 V).
4 VDD power_in Core digital supply (+3.3 V nominal).
5 T4PWM/T4CMP/IOPF3 bidirectional EVB Timer-4 PWM/compare output, or GPIO IOPF3. Internal pullup.
6 PDPINTA input Power drive protection interrupt A (falling-edge sensitive). When asserted, EVA PWM outputs are tri-stated to protect the motor drive from over-current/over-voltage. Internal pullup.
7 T3PWM/T3CMP/IOPF2 bidirectional EVB Timer-3 PWM/compare output, or GPIO IOPF2. Internal pullup.
8 PLLF2 passive PLL loop-filter input 2. Connect the external loop-filter network here.
9 PLLF passive PLL loop-filter input 1. Connect the external loop-filter network here.
10 PLLVCCA power_in PLL analog supply (+3.3 V). Should be filtered from the digital 3.3 V rail.
11 TDIRA/IOPB6 bidirectional EVA general-purpose timer counting-direction input, or GPIO IOPB6. Internal pullup.
12 T1PWM/T1CMP/IOPB4 bidirectional EVA Timer-1 PWM/compare output, or GPIO IOPB4. Internal pullup.
13 T2PWM/T2CMP/IOPB5 bidirectional EVA Timer-2 PWM/compare output, or GPIO IOPB5. Internal pullup.
14 IOPC0 bidirectional General-purpose I/O (port C, bit 0). Primary function on LF2407A is W/R; on LF2406A this pin is GPIO only. Internal pullup.
15 XINT2/ADCSOC/IOPD0 bidirectional External interrupt 2 and external ADC start-of-conversion input, or GPIO IOPD0. Edge-sensitive with programmable polarity. Internal pullup.
16 XINT1/IOPA2 bidirectional External interrupt 1 (edge-sensitive, programmable polarity), or GPIO IOPA2. Internal pullup.
17 SCITXD/IOPA0 bidirectional SCI asynchronous serial transmit data, or GPIO IOPA0. Internal pullup.
18 SCIRXD/IOPA1 bidirectional SCI asynchronous serial receive data, or GPIO IOPA1. Internal pullup.
19 VSS power_in Core digital ground.
20 VDD power_in Core digital supply (+3.3 V).
21 SPISIMO/IOPC2 bidirectional SPI slave-in / master-out data, or GPIO IOPC2. Internal pullup.
22 SPISOMI/IOPC3 bidirectional SPI slave-out / master-in data, or GPIO IOPC3. Internal pullup.
23 SPISTE/IOPC5 bidirectional SPI slave transmit-enable (optional), or GPIO IOPC5. Internal pullup.
24 SPICLK/IOPC4 bidirectional SPI clock, or GPIO IOPC4. Internal pullup.
25 TMS2 input JTAG test-mode select #2 for scan-based emulation. Latched on the rising edge of TCK. Held with TMS and TRST during reset to enter PLL bypass. Internal pullup; can be left NC in user apps.
26 TCLKINA/IOPB7 bidirectional External clock input for the EVA GP timer, or GPIO IOPB7. Internal pullup.
27 PWM12/IOPE6 bidirectional EVB compare/PWM output #12, or GPIO IOPE6. Internal pullup.
28 PWM6/IOPB3 bidirectional EVA compare/PWM output #6, or GPIO IOPB3. Internal pullup.
29 VSSO power_in I/O-buffer ground reference.
30 VDDO power_in I/O-buffer supply (+3.3 V).
31 PWM5/IOPB2 bidirectional EVA compare/PWM output #5, or GPIO IOPB2. Internal pullup.
32 PWM11/IOPE5 bidirectional EVB compare/PWM output #11, or GPIO IOPE5. Internal pullup.
33 PWM4/IOPB1 bidirectional EVA compare/PWM output #4, or GPIO IOPB1. Internal pullup.
34 VSS power_in Core digital ground.
35 VDD power_in Core digital supply (+3.3 V).
36 PWM3/IOPB0 bidirectional EVA compare/PWM output #3, or GPIO IOPB0. Internal pullup.
37 PWM2/IOPA7 bidirectional EVA compare/PWM output #2, or GPIO IOPA7. Internal pullup.
38 PWM10/IOPE4 bidirectional EVB compare/PWM output #10, or GPIO IOPE4. Internal pullup.
39 PWM1/IOPA6 bidirectional EVA compare/PWM output #1, or GPIO IOPA6. Internal pullup.
40 VCCP power_in Flash programming voltage (+5 V). Required at 5 V during Flash programming. May be tied to +5 V or GND (not floating) during normal operation. No current-limit resistor. On ROM (LC) devices this pin is a no-connect.
41 PWM9/IOPE3 bidirectional EVB compare/PWM output #9, or GPIO IOPE3. Internal pullup.
42 TP1 unconnected Factory test pin 1. Leave unconnected.
43 PWM8/IOPE2 bidirectional EVB compare/PWM output #8, or GPIO IOPE2. Internal pullup.
44 TP2 unconnected Factory test pin 2. Leave unconnected.
45 PWM7/IOPE1 bidirectional EVB compare/PWM output #7, or GPIO IOPE1. Internal pullup.
46 VSSO power_in I/O-buffer ground.
47 VDDO power_in I/O-buffer supply (+3.3 V).
48 CAP6/IOPF1 bidirectional EVB capture input #6, or GPIO IOPF1. Internal pullup.
49 CANRX/IOPC7 bidirectional CAN 2.0B receive data, or GPIO IOPC7. Internal pullup.
50 CANTX/IOPC6 bidirectional CAN 2.0B transmit data, or GPIO IOPC6. Internal pullup.
51 CLKOUT/IOPE0 bidirectional CPU clock (CLKOUT) or watchdog clock (WDCLK) output, selected by SCSR bit 14. Reconfigurable as GPIO IOPE0. Internal pullup.
52 CAP3/IOPA5 bidirectional EVA capture input #3, or GPIO IOPA5. Internal pullup.
53 VSSO power_in I/O-buffer ground.
54 VDDO power_in I/O-buffer supply (+3.3 V).
55 CAP2/QEP2/IOPA4 bidirectional EVA capture input #2 / quadrature-encoder pulse input #2, or GPIO IOPA4. Internal pullup.
56 CAP5/QEP4/IOPF0 bidirectional EVB capture input #5 / quadrature-encoder pulse input #4, or GPIO IOPF0. Internal pullup.
57 CAP1/QEP1/IOPA3 bidirectional EVA capture input #1 / quadrature-encoder pulse input #1, or GPIO IOPA3. Internal pullup.
58 VSS power_in Core digital ground.
59 VDD power_in Core digital supply (+3.3 V).
60 CAP4/QEP3/IOPE7 bidirectional EVB capture input #4 / quadrature-encoder pulse input #3, or GPIO IOPE7. Internal pullup.
61 EMU0 bidirectional Emulator I/O #0. Interrupt to/from the emulator when TRST is high. Internal pullup.
62 EMU1/OFF bidirectional Emulator I/O #1 / OFF. When TRST is low, this pin drives OFF; asserting OFF (0) puts all output drivers in high-Z. Internal pullup.
63 VSSO power_in I/O-buffer ground.
64 VDDO power_in I/O-buffer supply (+3.3 V).
65 ADCIN15 input Analog input channel 15 to the 10-bit ADC.
66 ADCIN07 input Analog input channel 7 to the 10-bit ADC.
67 ADCIN06 input Analog input channel 6 to the 10-bit ADC.
68 ADCIN14 input Analog input channel 14 to the 10-bit ADC.
69 ADCIN05 input Analog input channel 5 to the 10-bit ADC.
70 ADCIN04 input Analog input channel 4 to the 10-bit ADC.
71 ADCIN13 input Analog input channel 13 to the 10-bit ADC.
72 ADCIN03 input Analog input channel 3 to the 10-bit ADC.
73 ADCIN12 input Analog input channel 12 to the 10-bit ADC.
74 ADCIN02 input Analog input channel 2 to the 10-bit ADC.
75 ADCIN11 input Analog input channel 11 to the 10-bit ADC.
76 ADCIN10 input Analog input channel 10 to the 10-bit ADC.
77 ADCIN01 input Analog input channel 1 to the 10-bit ADC.
78 ADCIN09 input Analog input channel 9 to the 10-bit ADC.
79 ADCIN00 input Analog input channel 0 to the 10-bit ADC.
80 ADCIN08 input Analog input channel 8 to the 10-bit ADC.
81 VREFLO passive ADC analog low-voltage reference input.
82 VREFHI passive ADC analog high-voltage reference input.
83 VCCA power_in Analog supply for the ADC (+3.3 V). Should be isolated/filtered from the digital 3.3 V rail for best ADC accuracy.
84 VSSA power_in Analog ground reference for the ADC.
85 BIO/IOPC1 bidirectional Branch-control input polled by BCND … BIO instruction; low = branch taken. Reconfigurable as GPIO IOPC1. Pull high if unused. Internal pullup.
86 BOOT_EN/XF bidirectional Sampled at reset as BOOT_EN (loads SCSR2.3); after reset drives XF (defaults high). Must be driven with a passive circuit only. Internal pullup. On ROM (LC) devices this pin behaves as XF only.
87 XTAL1/CLKIN input PLL/crystal oscillator input. Connect one side of the reference crystal or an external clock source here.
88 XTAL2 output Crystal oscillator output; connects to the other side of the reference crystal. Goes high-Z when EMU1/OFF is asserted low.
89 TCLKINB/IOPF5 bidirectional External clock input for the EVB GP timer, or GPIO IOPF5. Internal pullup.
90 VSS power_in Core digital ground.
91 VDD power_in Core digital supply (+3.3 V).
92 IOPF6 bidirectional General-purpose I/O (port F, bit 6). Internal pullup.
93 RS bidirectional Device reset (in) and watchdog reset (out). Open-drain output with internal pullup (~20 µA); DSP drives it low for 128 CLKIN cycles on a watchdog reset. Recommend driving externally with an open-drain device.
94 TCK input JTAG test clock. Internal pullup.
95 PDPINTB input Power drive protection interrupt B (falling-edge sensitive). Tri-states EVB PWM outputs on assertion. Internal pullup.
96 TDI input JTAG test data input; clocked in on the rising edge of TCK. Internal pullup.
97 VSSO power_in I/O-buffer ground.
98 VDDO power_in I/O-buffer supply (+3.3 V).
99 TDO output JTAG test data output; shifted out on the falling edge of TCK. Internal pulldown.
100 TMS input JTAG test-mode select; clocked into the TAP controller on the rising edge of TCK. Internal pullup.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Ordering variants

Same part, different packaging or reel option.

  • TMS320LF2406APZA
  • TMS320LF2406APZAPZS
  • TMS320LF2406APZAPGE
  • TMS320LF2406APZAPAG
  • TMS320LF2406APZAPG

CAD (KiCad official)

  • Symbol: TMS320LF2406APZA
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: tms320lf2406apza-etched.step / tms320lf2406apza-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tms320lf2406apza.step / tms320lf2406apza.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (141 pp, sha256 f19019cb4a75676b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF