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TMS320F2810PBKS
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Texas Instruments Digital Signal Processors (DSP/DSC), LQFP-128(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+165@@ -0,0 +1,165 @@+# TMS320F2810PBKS++**Texas Instruments** · Digital Signal Processors (DSP/DSC) · LQFP-128(14x14)++TMS320F2810PBKS from Texas Instruments, in a LQFP-128(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDDAIO | power_in | 3.3-V analog I/O power pin. |+| 2 | ADCINB0 | input | ADC analog input B0 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 3 | ADCINB1 | input | ADC analog input B1 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 4 | ADCINB2 | input | ADC analog input B2 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 5 | ADCINB3 | input | ADC analog input B3 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 6 | ADCINB4 | input | ADC analog input B4 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 7 | ADCINB5 | input | ADC analog input B5 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 8 | ADCINB6 | input | ADC analog input B6 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 9 | ADCINB7 | input | ADC analog input B7 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 10 | ADCREFM | bidirectional | ADC 1-V voltage reference output (or external reference input if enabled in software); needs a low-ESR (under 1.5 ohm) 10 uF ceramic capacitor to analog ground. |+| 11 | ADCREFP | bidirectional | ADC 2-V voltage reference output (or external reference input if enabled in software); needs a low-ESR (under 1.5 ohm) 10 uF ceramic capacitor to analog ground. |+| 12 | AVSSREFBG | power_in | ADC analog ground. |+| 13 | AVDDREFBG | power_in | ADC analog power (3.3 V). |+| 14 | VDDA1 | power_in | ADC analog 3.3-V supply. |+| 15 | VSSA1 | power_in | ADC analog ground. |+| 16 | ADCRESEXT | output | ADC external current bias resistor: 24.9 kOhm ±5% for ADC clock 1-18.75 MHz, 20 kOhm ±5% for 18.75-25 MHz. |+| 17 | VSS | power_in | Core and digital I/O ground pin. |+| 18 | GPIOF13/MDRA | bidirectional | GPIO or McBSP received serial data input, with internal pullup. |+| 19 | GPIOF12/MDXA | bidirectional | GPIO or McBSP transmitted serial data output. |+| 20 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 21 | GPIOF9/MCLKRA | bidirectional | GPIO or McBSP receive clock, with internal pullup. |+| 22 | GPIOF10/MFSXA | bidirectional | GPIO or McBSP transmit frame synch, with internal pullup. |+| 23 | GPIOF8/MCLKXA | bidirectional | GPIO or McBSP transmit clock, with internal pullup. |+| 24 | GPIOF11/MFSRA | bidirectional | GPIO or McBSP receive frame synch, with internal pullup. |+| 25 | VDDIO | power_in | 3.3-V I/O digital power pin. |+| 26 | VSS | power_in | Core and digital I/O ground pin. |+| 27 | GPIOF2/SPICLKA | bidirectional | GPIO or SPI clock. |+| 28 | GPIOF3/SPISTEA | bidirectional | GPIO or SPI slave transmit enable. |+| 29 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 30 | VSS | power_in | Core and digital I/O ground pin. |+| 31 | GPIOF0/SPISIMOA | bidirectional | GPIO or SPI slave in, master out. |+| 32 | GPIOF1/SPISOMIA | bidirectional | GPIO or SPI slave out, master in. |+| 33 | GPIOB0/PWM7 | bidirectional | GPIO or PWM output pin #7, with internal pullup. |+| 34 | GPIOB1/PWM8 | bidirectional | GPIO or PWM output pin #8, with internal pullup. |+| 35 | GPIOB2/PWM9 | bidirectional | GPIO or PWM output pin #9, with internal pullup. |+| 36 | GPIOB3/PWM10 | bidirectional | GPIO or PWM output pin #10, with internal pullup. |+| 37 | GPIOB4/PWM11 | bidirectional | GPIO or PWM output pin #11, with internal pullup. |+| 38 | GPIOB5/PWM12 | bidirectional | GPIO or PWM output pin #12, with internal pullup. |+| 39 | VSS | power_in | Core and digital I/O ground pin. |+| 40 | GPIOB6/T3PWM_T3CMP | bidirectional | GPIO or Timer 3 output, with internal pullup. |+| 41 | GPIOB7/T4PWM_T4CMP | bidirectional | GPIO or Timer 4 output, with internal pullup. |+| 42 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 43 | GPIOB8/CAP4_QEP3 | bidirectional | GPIO or capture input #4, with internal pullup. |+| 44 | GPIOB9/CAP5_QEP4 | bidirectional | GPIO or capture input #5, with internal pullup. |+| 45 | GPIOB10/CAP6_QEPI2 | bidirectional | GPIO or capture input #6, with internal pullup. |+| 46 | GPIOB13/C4TRIP | bidirectional | GPIO or Compare 4 output trip, with internal pullup. |+| 47 | GPIOB14/C5TRIP | bidirectional | GPIO or Compare 5 output trip, with internal pullup. |+| 48 | GPIOB15/C6TRIP | bidirectional | GPIO or Compare 6 output trip, with internal pullup. |+| 49 | VDDIO | power_in | 3.3-V I/O digital power pin. |+| 50 | TEST2 | unconnected | Test pin reserved for TI; must be left unconnected. |+| 51 | TEST1 | unconnected | Test pin reserved for TI; must be left unconnected. |+| 52 | VDD3VFL | power_in | 3.3-V flash core power pin; must be connected to 3.3 V at all times after power-up sequence requirements are met. |+| 53 | VSS | power_in | Core and digital I/O ground pin. |+| 54 | GPIOB11/TDIRB | bidirectional | GPIO or timer direction, with internal pullup. |+| 55 | GPIOB12/TCLKINB | bidirectional | GPIO or timer clock input, with internal pullup. |+| 56 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 57 | X2 | output | Oscillator output. |+| 58 | X1/XCLKIN | input | Oscillator input or external clock input, referenced to the 1.8-V (or 1.9-V) core supply VDD rather than VDDIO; logic high must not exceed VDD. |+| 59 | VSS | power_in | Core and digital I/O ground pin. |+| 60 | GPIOD5/T3CTRIP_PDPINTB | bidirectional | GPIO or Timer 3 compare output trip, with internal pullup. |+| 61 | GPIOD6/T4CTRIP/EVBSOC | bidirectional | GPIO or Timer 4 compare output trip or external ADC start-of-conversion EV-B, with internal pullup. |+| 62 | VSS | power_in | Core and digital I/O ground pin. |+| 63 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 64 | GPIOF6/CANTXA | bidirectional | GPIO or eCAN transmit data, with internal pullup. |+| 65 | GPIOF7/CANRXA | bidirectional | GPIO or eCAN receive data, with internal pullup. |+| 66 | GPIOG4/SCITXDB | bidirectional | GPIO or SCI-B asynchronous serial port transmit data. |+| 67 | GPIOG5/SCIRXDB | bidirectional | GPIO or SCI-B asynchronous serial port receive data. |+| 68 | GPIOA0/PWM1 | bidirectional | GPIO or PWM output pin #1, with internal pullup. |+| 69 | GPIOA1/PWM2 | bidirectional | GPIO or PWM output pin #2, with internal pullup. |+| 70 | GPIOA2/PWM3 | bidirectional | GPIO or PWM output pin #3, with internal pullup. |+| 71 | GPIOA3/PWM4 | bidirectional | GPIO or PWM output pin #4, with internal pullup. |+| 72 | GPIOA4/PWM5 | bidirectional | GPIO or PWM output pin #5, with internal pullup. |+| 73 | VSS | power_in | Core and digital I/O ground pin. |+| 74 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 75 | GPIOA5/PWM6 | bidirectional | GPIO or PWM output pin #6, with internal pullup. |+| 76 | GPIOA6/T1PWM_T1CMP | bidirectional | GPIO or Timer 1 output, with internal pullup. |+| 77 | GPIOA7/T2PWM_T2CMP | bidirectional | GPIO or Timer 2 output, with internal pullup. |+| 78 | GPIOA8/CAP1_QEP1 | bidirectional | GPIO or capture input #1, with internal pullup. |+| 79 | GPIOA9/CAP2_QEP2 | bidirectional | GPIO or capture input #2, with internal pullup. |+| 80 | GPIOA10/CAP3_QEPI1 | bidirectional | GPIO or capture input #3, with internal pullup. |+| 81 | GPIOD0/T1CTRIP_PDPINTA | bidirectional | GPIO or Timer 1 compare output trip, with internal pullup. |+| 82 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 83 | VDDIO | power_in | 3.3-V I/O digital power pin. |+| 84 | GPIOD1/T2CTRIP/EVASOC | bidirectional | GPIO or Timer 2 compare output trip or external ADC start-of-conversion EV-A, with internal pullup. |+| 85 | GPIOA11/TDIRA | bidirectional | GPIO or timer direction, with internal pullup. |+| 86 | GPIOA12/TCLKINA | bidirectional | GPIO or timer clock input, with internal pullup. |+| 87 | XCLKOUT | output | Output clock derived from SYSCLKOUT at the same, 1/2 or 1/4 frequency (1/4 at reset); not high-impedance during reset and can be turned off via CLKOFF bit. |+| 88 | VSS | power_in | Core and digital I/O ground pin. |+| 89 | GPIOA13/C1TRIP | bidirectional | GPIO or Compare 1 output trip, with internal pullup. |+| 90 | GPIOA14/C2TRIP | bidirectional | GPIO or Compare 2 output trip, with internal pullup. |+| 91 | GPIOA15/C3TRIP | bidirectional | GPIO or Compare 3 output trip, with internal pullup. |+| 92 | TMS | input | JTAG test-mode select with internal pullup, clocked into the TAP controller on the rising edge of TCK. |+| 93 | TDO | tri_state | JTAG test data output; selected register contents are shifted out on the falling edge of TCK. |+| 94 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 95 | VSS | power_in | Core and digital I/O ground pin. |+| 96 | TDI | input | JTAG test data input with internal pullup, clocked into the selected register on the rising edge of TCK. |+| 97 | TESTSEL | input | Test pin reserved for TI with internal pulldown; must be connected to ground. |+| 98 | TRST | input | JTAG test reset with internal pulldown; active high, must be kept low during normal operation, no pullup resistors allowed. |+| 99 | TCK | input | JTAG test clock with internal pullup. |+| 100 | EMU0 | bidirectional | Emulator pin 0 with internal pullup; an external 2.2-kOhm to 4.7-kOhm pullup is recommended, also used for boundary-scan mode entry. |+| 101 | GPIOF14/XF_XPLLDIS | bidirectional | XF general-purpose output, GPIO, or XPLLDIS sampled during reset (PLL disabled if sensed low), with internal pullup. |+| 102 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 103 | VSS | power_in | Core and digital I/O ground pin. |+| 104 | VDDIO | power_in | 3.3-V I/O digital power pin. |+| 105 | EMU1 | bidirectional | Emulator pin 1 with internal pullup; an external 2.2-kOhm to 4.7-kOhm pullup is recommended, also used for boundary-scan mode entry. |+| 106 | GPIOE0/XINT1_XBIO | bidirectional | GPIO or XINT1 or XBIO input. |+| 107 | GPIOE2/XNMI_XINT13 | bidirectional | GPIO or XNMI or XINT13, with internal pullup. |+| 108 | GPIOE1/XINT2_ADCSOC | bidirectional | GPIO or XINT2 or ADC start-of-conversion. |+| 109 | VSS | power_in | Core and digital I/O ground pin. |+| 110 | VDD | power_in | 1.8-V or 1.9-V core digital power pin. |+| 111 | GPIOF4/SCITXDA | bidirectional | GPIO or SCI-A asynchronous serial port TX data, with internal pullup. |+| 112 | GPIOF5/SCIRXDA | bidirectional | GPIO or SCI-A asynchronous serial port RX data, with internal pullup. |+| 113 | XRS | bidirectional | Device reset input and watchdog reset output (open-drain with internal 100-uA typical pullup); driven low for 512 XCLKIN cycles on watchdog reset. |+| 114 | VDD1 | power_in | ADC digital 1.8-V (or 1.9-V) supply. |+| 115 | VSS1 | power_in | ADC digital ground. |+| 116 | ADCBGREFIN | unconnected | Test pin reserved for TI; must be left unconnected. |+| 117 | VSSA2 | power_in | ADC analog ground. |+| 118 | VDDA2 | power_in | ADC analog 3.3-V supply. |+| 119 | ADCINA7 | input | ADC analog input A7 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 120 | ADCINA6 | input | ADC analog input A6 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 121 | ADCINA5 | input | ADC analog input A5 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 122 | ADCINA4 | input | ADC analog input A4 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 123 | ADCINA3 | input | ADC analog input A3 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 124 | ADCINA2 | input | ADC analog input A2 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 125 | ADCINA1 | input | ADC analog input A1 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 126 | ADCINA0 | input | ADC analog input A0 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up. |+| 127 | ADCLO | passive | Common low-side analog input; connect to analog ground. |+| 128 | VSSAIO | power_in | Analog I/O ground pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-128(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 128 |++## CAD (KiCad official)++- Symbol: `TMS320F2810PBKS`+- Footprint: `Package_QFP:LQFP-128_14x14mm_P0.4mm`+- 3D model: LQFP-128(14x14) (KiCad packages3D, STEP)+- 3D model files: `tms320f2810pbks-etched.step` / `tms320f2810pbks-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tms320f2810pbks.step` / `tms320f2810pbks.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com.cn/cn/lit/gpn/TMS320F2812) (173 pp, sha256 `3c891c6ecdaa247f`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tms320f2810pbks-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "tms320f2810pbks",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tms320f2810pbks.kicad_sym",+ "tms320f2810pbks.kicad_mod",+ "tms320f2810pbks.glb",+ "tms320f2810pbks.step",+ "tms320f2810pbks.lbr",+ "docs/hero.png",+ "docs/tms320f2810pbks-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tms320f2810pbks-hero.glb",+ "tms320f2810pbks-hero.overlay.json"+ ],+ "component": {+ "mpn": "TMS320F2810PBKS",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-128(14x14)",+ "pin_count": 128,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Digital Signal Processors (DSP/DSC)",+ "datasheet": "https://www.ti.com.cn/cn/lit/gpn/TMS320F2812",+ "parts": {+ "symbol": "tms320f2810pbks.kicad_sym",+ "footprint": "tms320f2810pbks.kicad_mod",+ "model_3d": "tms320f2810pbks-hero.glb",+ "model_3d_plain": "tms320f2810pbks.glb",+ "model_3d_step": "tms320f2810pbks-etched.step",+ "model_3d_step_plain": "tms320f2810pbks.step",+ "lbr": "tms320f2810pbks.lbr"+ },+ "distributor_links": {+ "lcsc": "C701551",+ "digikey": "296-26859-ND",+ "mouser": "595-TMS320F2810PBKS"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:16:01Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-26859-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TMS320F2810PBKS",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDDAIO",+ "type": "power_in",+ "description": "3.3-V analog I/O power pin."+ },+ {+ "number": "2",+ "name": "ADCINB0",+ "type": "input",+ "description": "ADC analog input B0 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "3",+ "name": "ADCINB1",+ "type": "input",+ "description": "ADC analog input B1 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "4",+ "name": "ADCINB2",+ "type": "input",+ "description": "ADC analog input B2 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "5",+ "name": "ADCINB3",+ "type": "input",+ "description": "ADC analog input B3 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "6",+ "name": "ADCINB4",+ "type": "input",+ "description": "ADC analog input B4 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "7",+ "name": "ADCINB5",+ "type": "input",+ "description": "ADC analog input B5 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "8",+ "name": "ADCINB6",+ "type": "input",+ "description": "ADC analog input B6 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "9",+ "name": "ADCINB7",+ "type": "input",+ "description": "ADC analog input B7 (Sample-and-Hold B); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "10",+ "name": "ADCREFM",+ "type": "bidirectional",+ "description": "ADC 1-V voltage reference output (or external reference input if enabled in software); needs a low-ESR (under 1.5 ohm) 10 uF ceramic capacitor to analog ground."+ },+ {+ "number": "11",+ "name": "ADCREFP",+ "type": "bidirectional",+ "description": "ADC 2-V voltage reference output (or external reference input if enabled in software); needs a low-ESR (under 1.5 ohm) 10 uF ceramic capacitor to analog ground."+ },+ {+ "number": "12",+ "name": "AVSSREFBG",+ "type": "power_in",+ "description": "ADC analog ground."+ },+ {+ "number": "13",+ "name": "AVDDREFBG",+ "type": "power_in",+ "description": "ADC analog power (3.3 V)."+ },+ {+ "number": "14",+ "name": "VDDA1",+ "type": "power_in",+ "description": "ADC analog 3.3-V supply."+ },+ {+ "number": "15",+ "name": "VSSA1",+ "type": "power_in",+ "description": "ADC analog ground."+ },+ {+ "number": "16",+ "name": "ADCRESEXT",+ "type": "output",+ "description": "ADC external current bias resistor: 24.9 kOhm ±5% for ADC clock 1-18.75 MHz, 20 kOhm ±5% for 18.75-25 MHz."+ },+ {+ "number": "17",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "18",+ "name": "GPIOF13/MDRA",+ "type": "bidirectional",+ "description": "GPIO or McBSP received serial data input, with internal pullup."+ },+ {+ "number": "19",+ "name": "GPIOF12/MDXA",+ "type": "bidirectional",+ "description": "GPIO or McBSP transmitted serial data output."+ },+ {+ "number": "20",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "21",+ "name": "GPIOF9/MCLKRA",+ "type": "bidirectional",+ "description": "GPIO or McBSP receive clock, with internal pullup."+ },+ {+ "number": "22",+ "name": "GPIOF10/MFSXA",+ "type": "bidirectional",+ "description": "GPIO or McBSP transmit frame synch, with internal pullup."+ },+ {+ "number": "23",+ "name": "GPIOF8/MCLKXA",+ "type": "bidirectional",+ "description": "GPIO or McBSP transmit clock, with internal pullup."+ },+ {+ "number": "24",+ "name": "GPIOF11/MFSRA",+ "type": "bidirectional",+ "description": "GPIO or McBSP receive frame synch, with internal pullup."+ },+ {+ "number": "25",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3-V I/O digital power pin."+ },+ {+ "number": "26",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "27",+ "name": "GPIOF2/SPICLKA",+ "type": "bidirectional",+ "description": "GPIO or SPI clock."+ },+ {+ "number": "28",+ "name": "GPIOF3/SPISTEA",+ "type": "bidirectional",+ "description": "GPIO or SPI slave transmit enable."+ },+ {+ "number": "29",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "30",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "31",+ "name": "GPIOF0/SPISIMOA",+ "type": "bidirectional",+ "description": "GPIO or SPI slave in, master out."+ },+ {+ "number": "32",+ "name": "GPIOF1/SPISOMIA",+ "type": "bidirectional",+ "description": "GPIO or SPI slave out, master in."+ },+ {+ "number": "33",+ "name": "GPIOB0/PWM7",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #7, with internal pullup."+ },+ {+ "number": "34",+ "name": "GPIOB1/PWM8",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #8, with internal pullup."+ },+ {+ "number": "35",+ "name": "GPIOB2/PWM9",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #9, with internal pullup."+ },+ {+ "number": "36",+ "name": "GPIOB3/PWM10",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #10, with internal pullup."+ },+ {+ "number": "37",+ "name": "GPIOB4/PWM11",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #11, with internal pullup."+ },+ {+ "number": "38",+ "name": "GPIOB5/PWM12",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #12, with internal pullup."+ },+ {+ "number": "39",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "40",+ "name": "GPIOB6/T3PWM_T3CMP",+ "type": "bidirectional",+ "description": "GPIO or Timer 3 output, with internal pullup."+ },+ {+ "number": "41",+ "name": "GPIOB7/T4PWM_T4CMP",+ "type": "bidirectional",+ "description": "GPIO or Timer 4 output, with internal pullup."+ },+ {+ "number": "42",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "43",+ "name": "GPIOB8/CAP4_QEP3",+ "type": "bidirectional",+ "description": "GPIO or capture input #4, with internal pullup."+ },+ {+ "number": "44",+ "name": "GPIOB9/CAP5_QEP4",+ "type": "bidirectional",+ "description": "GPIO or capture input #5, with internal pullup."+ },+ {+ "number": "45",+ "name": "GPIOB10/CAP6_QEPI2",+ "type": "bidirectional",+ "description": "GPIO or capture input #6, with internal pullup."+ },+ {+ "number": "46",+ "name": "GPIOB13/C4TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 4 output trip, with internal pullup."+ },+ {+ "number": "47",+ "name": "GPIOB14/C5TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 5 output trip, with internal pullup."+ },+ {+ "number": "48",+ "name": "GPIOB15/C6TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 6 output trip, with internal pullup."+ },+ {+ "number": "49",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3-V I/O digital power pin."+ },+ {+ "number": "50",+ "name": "TEST2",+ "type": "unconnected",+ "description": "Test pin reserved for TI; must be left unconnected."+ },+ {+ "number": "51",+ "name": "TEST1",+ "type": "unconnected",+ "description": "Test pin reserved for TI; must be left unconnected."+ },+ {+ "number": "52",+ "name": "VDD3VFL",+ "type": "power_in",+ "description": "3.3-V flash core power pin; must be connected to 3.3 V at all times after power-up sequence requirements are met."+ },+ {+ "number": "53",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "54",+ "name": "GPIOB11/TDIRB",+ "type": "bidirectional",+ "description": "GPIO or timer direction, with internal pullup."+ },+ {+ "number": "55",+ "name": "GPIOB12/TCLKINB",+ "type": "bidirectional",+ "description": "GPIO or timer clock input, with internal pullup."+ },+ {+ "number": "56",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "57",+ "name": "X2",+ "type": "output",+ "description": "Oscillator output."+ },+ {+ "number": "58",+ "name": "X1/XCLKIN",+ "type": "input",+ "description": "Oscillator input or external clock input, referenced to the 1.8-V (or 1.9-V) core supply VDD rather than VDDIO; logic high must not exceed VDD."+ },+ {+ "number": "59",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "60",+ "name": "GPIOD5/T3CTRIP_PDPINTB",+ "type": "bidirectional",+ "description": "GPIO or Timer 3 compare output trip, with internal pullup."+ },+ {+ "number": "61",+ "name": "GPIOD6/T4CTRIP/EVBSOC",+ "type": "bidirectional",+ "description": "GPIO or Timer 4 compare output trip or external ADC start-of-conversion EV-B, with internal pullup."+ },+ {+ "number": "62",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "63",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "64",+ "name": "GPIOF6/CANTXA",+ "type": "bidirectional",+ "description": "GPIO or eCAN transmit data, with internal pullup."+ },+ {+ "number": "65",+ "name": "GPIOF7/CANRXA",+ "type": "bidirectional",+ "description": "GPIO or eCAN receive data, with internal pullup."+ },+ {+ "number": "66",+ "name": "GPIOG4/SCITXDB",+ "type": "bidirectional",+ "description": "GPIO or SCI-B asynchronous serial port transmit data."+ },+ {+ "number": "67",+ "name": "GPIOG5/SCIRXDB",+ "type": "bidirectional",+ "description": "GPIO or SCI-B asynchronous serial port receive data."+ },+ {+ "number": "68",+ "name": "GPIOA0/PWM1",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #1, with internal pullup."+ },+ {+ "number": "69",+ "name": "GPIOA1/PWM2",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #2, with internal pullup."+ },+ {+ "number": "70",+ "name": "GPIOA2/PWM3",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #3, with internal pullup."+ },+ {+ "number": "71",+ "name": "GPIOA3/PWM4",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #4, with internal pullup."+ },+ {+ "number": "72",+ "name": "GPIOA4/PWM5",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #5, with internal pullup."+ },+ {+ "number": "73",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "74",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "75",+ "name": "GPIOA5/PWM6",+ "type": "bidirectional",+ "description": "GPIO or PWM output pin #6, with internal pullup."+ },+ {+ "number": "76",+ "name": "GPIOA6/T1PWM_T1CMP",+ "type": "bidirectional",+ "description": "GPIO or Timer 1 output, with internal pullup."+ },+ {+ "number": "77",+ "name": "GPIOA7/T2PWM_T2CMP",+ "type": "bidirectional",+ "description": "GPIO or Timer 2 output, with internal pullup."+ },+ {+ "number": "78",+ "name": "GPIOA8/CAP1_QEP1",+ "type": "bidirectional",+ "description": "GPIO or capture input #1, with internal pullup."+ },+ {+ "number": "79",+ "name": "GPIOA9/CAP2_QEP2",+ "type": "bidirectional",+ "description": "GPIO or capture input #2, with internal pullup."+ },+ {+ "number": "80",+ "name": "GPIOA10/CAP3_QEPI1",+ "type": "bidirectional",+ "description": "GPIO or capture input #3, with internal pullup."+ },+ {+ "number": "81",+ "name": "GPIOD0/T1CTRIP_PDPINTA",+ "type": "bidirectional",+ "description": "GPIO or Timer 1 compare output trip, with internal pullup."+ },+ {+ "number": "82",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "83",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3-V I/O digital power pin."+ },+ {+ "number": "84",+ "name": "GPIOD1/T2CTRIP/EVASOC",+ "type": "bidirectional",+ "description": "GPIO or Timer 2 compare output trip or external ADC start-of-conversion EV-A, with internal pullup."+ },+ {+ "number": "85",+ "name": "GPIOA11/TDIRA",+ "type": "bidirectional",+ "description": "GPIO or timer direction, with internal pullup."+ },+ {+ "number": "86",+ "name": "GPIOA12/TCLKINA",+ "type": "bidirectional",+ "description": "GPIO or timer clock input, with internal pullup."+ },+ {+ "number": "87",+ "name": "XCLKOUT",+ "type": "output",+ "description": "Output clock derived from SYSCLKOUT at the same, 1/2 or 1/4 frequency (1/4 at reset); not high-impedance during reset and can be turned off via CLKOFF bit."+ },+ {+ "number": "88",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "89",+ "name": "GPIOA13/C1TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 1 output trip, with internal pullup."+ },+ {+ "number": "90",+ "name": "GPIOA14/C2TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 2 output trip, with internal pullup."+ },+ {+ "number": "91",+ "name": "GPIOA15/C3TRIP",+ "type": "bidirectional",+ "description": "GPIO or Compare 3 output trip, with internal pullup."+ },+ {+ "number": "92",+ "name": "TMS",+ "type": "input",+ "description": "JTAG test-mode select with internal pullup, clocked into the TAP controller on the rising edge of TCK."+ },+ {+ "number": "93",+ "name": "TDO",+ "type": "tri_state",+ "description": "JTAG test data output; selected register contents are shifted out on the falling edge of TCK."+ },+ {+ "number": "94",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "95",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "96",+ "name": "TDI",+ "type": "input",+ "description": "JTAG test data input with internal pullup, clocked into the selected register on the rising edge of TCK."+ },+ {+ "number": "97",+ "name": "TESTSEL",+ "type": "input",+ "description": "Test pin reserved for TI with internal pulldown; must be connected to ground."+ },+ {+ "number": "98",+ "name": "TRST",+ "type": "input",+ "description": "JTAG test reset with internal pulldown; active high, must be kept low during normal operation, no pullup resistors allowed."+ },+ {+ "number": "99",+ "name": "TCK",+ "type": "input",+ "description": "JTAG test clock with internal pullup."+ },+ {+ "number": "100",+ "name": "EMU0",+ "type": "bidirectional",+ "description": "Emulator pin 0 with internal pullup; an external 2.2-kOhm to 4.7-kOhm pullup is recommended, also used for boundary-scan mode entry."+ },+ {+ "number": "101",+ "name": "GPIOF14/XF_XPLLDIS",+ "type": "bidirectional",+ "description": "XF general-purpose output, GPIO, or XPLLDIS sampled during reset (PLL disabled if sensed low), with internal pullup."+ },+ {+ "number": "102",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "103",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "104",+ "name": "VDDIO",+ "type": "power_in",+ "description": "3.3-V I/O digital power pin."+ },+ {+ "number": "105",+ "name": "EMU1",+ "type": "bidirectional",+ "description": "Emulator pin 1 with internal pullup; an external 2.2-kOhm to 4.7-kOhm pullup is recommended, also used for boundary-scan mode entry."+ },+ {+ "number": "106",+ "name": "GPIOE0/XINT1_XBIO",+ "type": "bidirectional",+ "description": "GPIO or XINT1 or XBIO input."+ },+ {+ "number": "107",+ "name": "GPIOE2/XNMI_XINT13",+ "type": "bidirectional",+ "description": "GPIO or XNMI or XINT13, with internal pullup."+ },+ {+ "number": "108",+ "name": "GPIOE1/XINT2_ADCSOC",+ "type": "bidirectional",+ "description": "GPIO or XINT2 or ADC start-of-conversion."+ },+ {+ "number": "109",+ "name": "VSS",+ "type": "power_in",+ "description": "Core and digital I/O ground pin."+ },+ {+ "number": "110",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8-V or 1.9-V core digital power pin."+ },+ {+ "number": "111",+ "name": "GPIOF4/SCITXDA",+ "type": "bidirectional",+ "description": "GPIO or SCI-A asynchronous serial port TX data, with internal pullup."+ },+ {+ "number": "112",+ "name": "GPIOF5/SCIRXDA",+ "type": "bidirectional",+ "description": "GPIO or SCI-A asynchronous serial port RX data, with internal pullup."+ },+ {+ "number": "113",+ "name": "XRS",+ "type": "bidirectional",+ "description": "Device reset input and watchdog reset output (open-drain with internal 100-uA typical pullup); driven low for 512 XCLKIN cycles on watchdog reset."+ },+ {+ "number": "114",+ "name": "VDD1",+ "type": "power_in",+ "description": "ADC digital 1.8-V (or 1.9-V) supply."+ },+ {+ "number": "115",+ "name": "VSS1",+ "type": "power_in",+ "description": "ADC digital ground."+ },+ {+ "number": "116",+ "name": "ADCBGREFIN",+ "type": "unconnected",+ "description": "Test pin reserved for TI; must be left unconnected."+ },+ {+ "number": "117",+ "name": "VSSA2",+ "type": "power_in",+ "description": "ADC analog ground."+ },+ {+ "number": "118",+ "name": "VDDA2",+ "type": "power_in",+ "description": "ADC analog 3.3-V supply."+ },+ {+ "number": "119",+ "name": "ADCINA7",+ "type": "input",+ "description": "ADC analog input A7 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "120",+ "name": "ADCINA6",+ "type": "input",+ "description": "ADC analog input A6 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "121",+ "name": "ADCINA5",+ "type": "input",+ "description": "ADC analog input A5 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "122",+ "name": "ADCINA4",+ "type": "input",+ "description": "ADC analog input A4 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "123",+ "name": "ADCINA3",+ "type": "input",+ "description": "ADC analog input A3 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "124",+ "name": "ADCINA2",+ "type": "input",+ "description": "ADC analog input A2 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "125",+ "name": "ADCINA1",+ "type": "input",+ "description": "ADC analog input A1 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "126",+ "name": "ADCINA0",+ "type": "input",+ "description": "ADC analog input A0 (Sample-and-Hold A); should not be driven before VDDA1, VDDA2 and VDDAIO are fully powered up."+ },+ {+ "number": "127",+ "name": "ADCLO",+ "type": "passive",+ "description": "Common low-side analog input; connect to analog ground."+ },+ {+ "number": "128",+ "name": "VSSAIO",+ "type": "power_in",+ "description": "Analog I/O ground pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The F2810/F2811 128-pin PBK package has no external memory interface. The XINTF signals (XA[0:18], X; Pins 50, 51 (TEST2, TEST1) and 116 (ADCBGREFIN) are marked by the datasheet as test pins that must b; Pin types are mapped to KiCad ERC classes from the datasheet I/O/Z and PU/PD columns: I/O and I/O/Z "+ ],+ "pages_sent": 42,+ "cost_usd": 0.3252,+ "at": "2026-10-08T04:15:20"+ },+ "datasheet": {+ "url": "https://www.ti.com.cn/cn/lit/gpn/TMS320F2812",+ "pages": 173,+ "sha256": "3c891c6ecdaa247f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 128,+ "described": 128,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tms320f2810pbks.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7c58a84c7972bfb65ec57c1a8618dfc37e54897d86a32015ddb0c453a7af1827",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tms320f2810pbks-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b17304564faa7f93794a591347b95ab3bea8fd9e6a930569d36b7eb00b940774",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}