component
TMS320F28069PNT
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+117@@ -0,0 +1,117 @@+# TMS320F28069PNT++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)++TMS320F28069PNT from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GPIO23/EQEP1I/MFSXA/SCIRXDB | bidirectional | General-purpose input/output 23 with alternate peripheral functions for enhanced quadrature encoder pulse index, McBSP frame sync, or SCI receive data. |+| 2 | VDD | power_in | CPU and logic digital power pin. |+| 3 | VSS | power_in | Digital ground pin. |+| 4 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 5 | GPIO20/EQEP1A/MDXA/COMP1OUT | bidirectional | General-purpose input/output 20 with alternate functions for enhanced QEP1 input A, McBSP transmit data, or Comparator 1 output. |+| 6 | GPIO21/EQEP1B/MDRA/COMP2OUT | bidirectional | General-purpose input/output 21 with alternate functions for enhanced QEP1 input B, McBSP receive data, or Comparator 2 output. |+| 7 | GPIO4/EPWM3A | bidirectional | General-purpose input/output 4 with alternate function as enhanced PWM3 output A and HRPWM channel. |+| 8 | GPIO5/EPWM3B/SPISIMOA/ECAP1 | bidirectional | General-purpose input/output 5 with alternate functions for enhanced PWM3 output B, SPI-A master-out slave-in, or enhanced capture input/output 1. |+| 9 | XRS | bidirectional | Device reset input/output open-drain; driven low by device during power-on or brownout reset and watchdog reset, or driven externally by external circuit. |+| 10 | TRST | input | JTAG test reset with internal pulldown; active-high test pin that must be maintained low during normal device operation. |+| 11 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 12 | VDD | power_in | CPU and logic digital power pin. |+| 13 | VSS | power_in | Digital ground pin. |+| 14 | ADCINA6/COMP3A/AIO6 | input | ADC group A channel 6 input with alternate functions as Comparator 3A input or analog I/O 6. |+| 15 | ADCINA5 | input | ADC group A channel 5 input. |+| 16 | ADCINA4/COMP2A/AIO4 | input | ADC group A channel 4 input with alternate functions as Comparator 2A input or analog I/O 4. |+| 17 | ADCINA2/COMP1A/AIO2 | input | ADC group A channel 2 input with alternate functions as Comparator 1A input or analog I/O 2. |+| 18 | ADCINA1 | input | ADC group A channel 1 input. |+| 19 | ADCINA0/VREFHI | input | ADC group A channel 0 input; shares same pin with VREFHI for external ADC reference high, mutually exclusive use. |+| 20 | VDDA | power_in | Analog power pin; tie with 2.2-μF capacitor typical close to the pin. |+| 21 | VREFLO/VSSA | power_in | ADC external reference low and analog ground pin; always connected on 80-pin devices. |+| 22 | ADCINB0 | input | ADC group B channel 0 input. |+| 23 | ADCINB1 | input | ADC group B channel 1 input. |+| 24 | ADCINB2/COMP1B/AIO10 | input | ADC group B channel 2 input with alternate functions as Comparator 1B input or analog I/O 10. |+| 25 | ADCINB4/COMP2B/AIO12 | input | ADC group B channel 4 input with alternate functions as Comparator 2B input or analog I/O 12. |+| 26 | ADCINB5 | input | ADC group B channel 5 input. |+| 27 | ADCINB6/COMP3B/AIO14 | input | ADC group B channel 6 input with alternate functions as Comparator 3B input or analog I/O 14. |+| 28 | VSS | power_in | Digital ground pin. |+| 29 | VDD | power_in | CPU and logic digital power pin. |+| 30 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 31 | GPIO25/ECAP2/EQEP2B/SPISOMIB | bidirectional | General-purpose input/output 25 with alternate functions for enhanced capture input/output 2, enhanced QEP2 input B, or SPI-B master-in slave-out. |+| 32 | GPIO31/CANTXA/EQEP2S/EPWM8A | bidirectional | General-purpose input/output 31 with alternate functions for CAN transmit, enhanced QEP2 strobe, or enhanced PWM8 output A. |+| 33 | GPIO30/CANRXA/EQEP2I/EPWM7A | bidirectional | General-purpose input/output 30 with alternate functions for CAN receive, enhanced QEP2 index, or enhanced PWM7 output A. |+| 34 | GPIO29/SCITXDA/SCLA/TZ3 | bidirectional | General-purpose input/output 29 with alternate functions for SCI-A transmit, I2C clock open-drain bidirectional, or Trip Zone input 3. |+| 35 | GPIO12/TZ1/SCITXDA/SPISIMOB | bidirectional | General-purpose input/output 12 with alternate functions for Trip Zone input 1, SCI-A transmit, or SPI-B master-in slave-out. |+| 36 | TEST2 | unconnected | Test pin reserved for TI; must be left unconnected. |+| 37 | VDD3VFL | power_in | 3.3-V flash core power pin; must be connected to 3.3 V at all times. |+| 38 | VSS | power_in | Digital ground pin. |+| 39 | GPIO9/EPWM5B/SCITXDB/ECAP3 | bidirectional | General-purpose input/output 9 with alternate functions for enhanced PWM5 output B, SCI-B transmit, or enhanced capture input/output 3. |+| 40 | GPIO28/SCIRXDA/SDAA/TZ2 | bidirectional | General-purpose input/output 28 with alternate functions for SCI-A receive, I2C data open-drain bidirectional, or Trip Zone input 2. |+| 41 | GPIO18/SPICLKA/SCITXDB/XCLKOUT | bidirectional | General-purpose input/output 18 with alternate functions for SPI-A clock, SCI-B transmit, or output clock derived from SYSCLKOUT. |+| 42 | GPIO17/SPISOMIA/TZ3 | bidirectional | General-purpose input/output 17 with alternate functions for SPI-A master-in slave-out or Trip Zone input 3. |+| 43 | GPIO8/EPWM5A/ADCSOCAO | bidirectional | General-purpose input/output 8 with alternate functions for enhanced PWM5 output A and HRPWM channel or ADC start-of-conversion A. |+| 44 | GPIO16/SPISIMOA/TZ2 | bidirectional | General-purpose input/output 16 with alternate functions for SPI-A master-out slave-in or Trip Zone input 2. |+| 45 | GPIO7/EPWM4B/SCIRXDA/ECAP2 | bidirectional | General-purpose input/output 7 with alternate functions for enhanced PWM4 output B, SCI-A receive, or enhanced capture input/output 2. |+| 46 | GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO | bidirectional | General-purpose input/output 6 with alternate functions for enhanced PWM4 output A and HRPWM channel, enhanced PWM sync pulse input, or output. |+| 47 | X2 | output | On-chip crystal-oscillator output; quartz crystal or ceramic resonator connected across X1 and X2, left unconnected if not used. |+| 48 | X1 | input | On-chip 1.8-V crystal-oscillator input; quartz crystal or ceramic resonator connected across X1 and X2, tied to GND if not used. |+| 49 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 50 | VSS | power_in | Digital ground pin. |+| 51 | VDD | power_in | CPU and logic digital power pin. |+| 52 | GPIO19/XCLKIN/SPISTEA/SCIRXDB/ECAP1 | bidirectional | General-purpose input/output 19 with alternate functions for external oscillator input, SPI-A transmit enable, SCI-B receive, or enhanced capture input/output 1. |+| 53 | GPIO39 | bidirectional | General-purpose input/output 39. |+| 54 | GPIO38/XCLKIN/TCK | bidirectional | General-purpose input/output 38 with alternate functions for external oscillator input or JTAG test clock with internal pullup. |+| 55 | GPIO34/COMP2OUT/COMP3OUT | bidirectional | General-purpose input/output 34 with alternate output functions for Comparator 2 or Comparator 3 direct outputs. |+| 56 | GPIO37/TDO | tri_state | General-purpose input/output 37 with alternate function as JTAG scan out, test data output; contents of selected register shifted on TCK falling edge with 8-mA drive. |+| 57 | GPIO35/TDI | input | General-purpose input/output 35 with alternate function as JTAG test data input; clocked into selected register on TCK rising edge with internal pullup. |+| 58 | GPIO36/TMS | input | General-purpose input/output 36 with alternate function as JTAG test-mode select; clocked into TAP controller on TCK rising edge with internal pullup. |+| 59 | GPIO11/EPWM6B/SCIRXDB/ECAP1 | bidirectional | General-purpose input/output 11 with alternate functions for enhanced PWM6 output B, SCI-B receive, or enhanced capture input/output 1. |+| 60 | GPIO10/EPWM6A/ADCSOCBO | bidirectional | General-purpose input/output 10 with alternate functions for enhanced PWM6 output A and HRPWM channel or ADC start-of-conversion B. |+| 61 | GPIO27/HRCAP2/EQEP2S/SPISTEB/USB0DM | bidirectional | General-purpose input/output 27 with alternate functions for high-resolution input capture 2, enhanced QEP2 strobe, SPI-B transmit enable, or USB negative differential signal. |+| 62 | GPIO26/ECAP3/EQEP2I/SPICLKB/USB0DP | bidirectional | General-purpose input/output 26 with alternate functions for enhanced capture input/output 3, enhanced QEP2 index, SPI-B clock, or USB positive differential signal. |+| 63 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 64 | VSS | power_in | Digital ground pin. |+| 65 | VDD | power_in | CPU and logic digital power pin. |+| 66 | GPIO3/EPWM2B/SPISOMIA/COMP2OUT | bidirectional | General-purpose input/output 3 with alternate functions for enhanced PWM2 output B, SPI-A master-in slave-out, or Comparator 2 direct output. |+| 67 | GPIO2/EPWM2A | bidirectional | General-purpose input/output 2 with alternate function as enhanced PWM2 output A and HRPWM channel. |+| 68 | GPIO1/EPWM1B/COMP1OUT | bidirectional | General-purpose input/output 1 with alternate functions for enhanced PWM1 output B or Comparator 1 direct output. |+| 69 | GPIO0/EPWM1A | bidirectional | General-purpose input/output 0 with alternate function as enhanced PWM1 output A and HRPWM channel. |+| 70 | GPIO15/ECAP2/SCIRXDB/SPISTEB | bidirectional | General-purpose input/output 15 with alternate functions for enhanced capture input/output 2, SCI-B receive, or SPI-B transmit enable. |+| 71 | VREGENZ | input | Internal voltage regulator enable with internal pulldown; tie to VSS to enable 1.8-V VREG or tie to VDDIO to disable VREG and use external 1.8-V supply. |+| 72 | VDD | power_in | CPU and logic digital power pin. |+| 73 | VSS | power_in | Digital ground pin. |+| 74 | VDDIO | power_in | Digital I/O buffers power pin for single supply source when VREG is enabled. |+| 75 | GPIO13/TZ2/SPISOMIB | bidirectional | General-purpose input/output 13 with alternate functions for Trip Zone input 2 or SPI-B master-in slave-out. |+| 76 | GPIO14/TZ3/SCITXDB/SPICLKB | bidirectional | General-purpose input/output 14 with alternate functions for Trip Zone input 3, SCI-B transmit, or SPI-B clock. |+| 77 | GPIO24/ECAP1/EQEP2A/SPISIMOB | bidirectional | General-purpose input/output 24 with alternate functions for enhanced capture input/output 1, enhanced QEP2 input A, or SPI-B master-out slave-in. |+| 78 | GPIO22/EQEP1S/MCLKXA/SCITXDB | bidirectional | General-purpose input/output 22 with alternate functions for enhanced QEP1 strobe, McBSP transmit clock, or SCI-B transmit data. |+| 79 | GPIO32/SDAA/EPWMSYNCI/ADCSOCAO | bidirectional | General-purpose input/output 32 with alternate functions for I2C data open-drain bidirectional, enhanced PWM external sync pulse input, or ADC start-of-conversion A. |+| 80 | GPIO33/SCLA/EPWMSYNCO/ADCSOCBO | bidirectional | General-purpose input/output 33 with alternate functions for I2C clock open-drain bidirectional, enhanced PWM external sync pulse output, or ADC start-of-conversion B. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-80(12x12) |+| Category | Embedded Processors & Controllers |+| Pins | 80 |++## CAD (KiCad official)++- Symbol: `TMS320F28069PNT`+- Footprint: `Package_QFP:LQFP-80_12x12mm_P0.5mm`+- 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)+- 3D model files: `tms320f28069pnt-etched.step` / `tms320f28069pnt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tms320f28069pnt.step` / `tms320f28069pnt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tms320f28062f) (206 pp, sha256 `3033efed856fc72a`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tms320f28069pnt-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "tms320f28069pnt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tms320f28069pnt.kicad_sym",+ "tms320f28069pnt.kicad_mod",+ "tms320f28069pnt.glb",+ "tms320f28069pnt.step",+ "tms320f28069pnt.lbr",+ "docs/hero.png",+ "docs/tms320f28069pnt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tms320f28069pnt-hero.glb",+ "tms320f28069pnt-hero.overlay.json"+ ],+ "component": {+ "mpn": "TMS320F28069PNT",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-80(12x12)",+ "pin_count": 80,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28062f",+ "parts": {+ "symbol": "tms320f28069pnt.kicad_sym",+ "footprint": "tms320f28069pnt.kicad_mod",+ "model_3d": "tms320f28069pnt-hero.glb",+ "model_3d_plain": "tms320f28069pnt.glb",+ "model_3d_step": "tms320f28069pnt-etched.step",+ "model_3d_step_plain": "tms320f28069pnt.step",+ "lbr": "tms320f28069pnt.lbr"+ },+ "distributor_links": {+ "lcsc": 544304,+ "digikey": "296-36040-ND",+ "mouser": "595-TMS320F28069PNT"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T03:20:22Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-36040-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TMS320F28069PNT",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GPIO23/EQEP1I/MFSXA/SCIRXDB",+ "type": "bidirectional",+ "description": "General-purpose input/output 23 with alternate peripheral functions for enhanced quadrature encoder pulse index, McBSP frame sync, or SCI receive data."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "3",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "4",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "5",+ "name": "GPIO20/EQEP1A/MDXA/COMP1OUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 20 with alternate functions for enhanced QEP1 input A, McBSP transmit data, or Comparator 1 output."+ },+ {+ "number": "6",+ "name": "GPIO21/EQEP1B/MDRA/COMP2OUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 21 with alternate functions for enhanced QEP1 input B, McBSP receive data, or Comparator 2 output."+ },+ {+ "number": "7",+ "name": "GPIO4/EPWM3A",+ "type": "bidirectional",+ "description": "General-purpose input/output 4 with alternate function as enhanced PWM3 output A and HRPWM channel."+ },+ {+ "number": "8",+ "name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",+ "type": "bidirectional",+ "description": "General-purpose input/output 5 with alternate functions for enhanced PWM3 output B, SPI-A master-out slave-in, or enhanced capture input/output 1."+ },+ {+ "number": "9",+ "name": "XRS",+ "type": "bidirectional",+ "description": "Device reset input/output open-drain; driven low by device during power-on or brownout reset and watchdog reset, or driven externally by external circuit."+ },+ {+ "number": "10",+ "name": "TRST",+ "type": "input",+ "description": "JTAG test reset with internal pulldown; active-high test pin that must be maintained low during normal device operation."+ },+ {+ "number": "11",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "12",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "13",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "14",+ "name": "ADCINA6/COMP3A/AIO6",+ "type": "input",+ "description": "ADC group A channel 6 input with alternate functions as Comparator 3A input or analog I/O 6."+ },+ {+ "number": "15",+ "name": "ADCINA5",+ "type": "input",+ "description": "ADC group A channel 5 input."+ },+ {+ "number": "16",+ "name": "ADCINA4/COMP2A/AIO4",+ "type": "input",+ "description": "ADC group A channel 4 input with alternate functions as Comparator 2A input or analog I/O 4."+ },+ {+ "number": "17",+ "name": "ADCINA2/COMP1A/AIO2",+ "type": "input",+ "description": "ADC group A channel 2 input with alternate functions as Comparator 1A input or analog I/O 2."+ },+ {+ "number": "18",+ "name": "ADCINA1",+ "type": "input",+ "description": "ADC group A channel 1 input."+ },+ {+ "number": "19",+ "name": "ADCINA0/VREFHI",+ "type": "input",+ "description": "ADC group A channel 0 input; shares same pin with VREFHI for external ADC reference high, mutually exclusive use."+ },+ {+ "number": "20",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog power pin; tie with 2.2-μF capacitor typical close to the pin."+ },+ {+ "number": "21",+ "name": "VREFLO/VSSA",+ "type": "power_in",+ "description": "ADC external reference low and analog ground pin; always connected on 80-pin devices."+ },+ {+ "number": "22",+ "name": "ADCINB0",+ "type": "input",+ "description": "ADC group B channel 0 input."+ },+ {+ "number": "23",+ "name": "ADCINB1",+ "type": "input",+ "description": "ADC group B channel 1 input."+ },+ {+ "number": "24",+ "name": "ADCINB2/COMP1B/AIO10",+ "type": "input",+ "description": "ADC group B channel 2 input with alternate functions as Comparator 1B input or analog I/O 10."+ },+ {+ "number": "25",+ "name": "ADCINB4/COMP2B/AIO12",+ "type": "input",+ "description": "ADC group B channel 4 input with alternate functions as Comparator 2B input or analog I/O 12."+ },+ {+ "number": "26",+ "name": "ADCINB5",+ "type": "input",+ "description": "ADC group B channel 5 input."+ },+ {+ "number": "27",+ "name": "ADCINB6/COMP3B/AIO14",+ "type": "input",+ "description": "ADC group B channel 6 input with alternate functions as Comparator 3B input or analog I/O 14."+ },+ {+ "number": "28",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "29",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "30",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "31",+ "name": "GPIO25/ECAP2/EQEP2B/SPISOMIB",+ "type": "bidirectional",+ "description": "General-purpose input/output 25 with alternate functions for enhanced capture input/output 2, enhanced QEP2 input B, or SPI-B master-in slave-out."+ },+ {+ "number": "32",+ "name": "GPIO31/CANTXA/EQEP2S/EPWM8A",+ "type": "bidirectional",+ "description": "General-purpose input/output 31 with alternate functions for CAN transmit, enhanced QEP2 strobe, or enhanced PWM8 output A."+ },+ {+ "number": "33",+ "name": "GPIO30/CANRXA/EQEP2I/EPWM7A",+ "type": "bidirectional",+ "description": "General-purpose input/output 30 with alternate functions for CAN receive, enhanced QEP2 index, or enhanced PWM7 output A."+ },+ {+ "number": "34",+ "name": "GPIO29/SCITXDA/SCLA/TZ3",+ "type": "bidirectional",+ "description": "General-purpose input/output 29 with alternate functions for SCI-A transmit, I2C clock open-drain bidirectional, or Trip Zone input 3."+ },+ {+ "number": "35",+ "name": "GPIO12/TZ1/SCITXDA/SPISIMOB",+ "type": "bidirectional",+ "description": "General-purpose input/output 12 with alternate functions for Trip Zone input 1, SCI-A transmit, or SPI-B master-in slave-out."+ },+ {+ "number": "36",+ "name": "TEST2",+ "type": "unconnected",+ "description": "Test pin reserved for TI; must be left unconnected."+ },+ {+ "number": "37",+ "name": "VDD3VFL",+ "type": "power_in",+ "description": "3.3-V flash core power pin; must be connected to 3.3 V at all times."+ },+ {+ "number": "38",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "39",+ "name": "GPIO9/EPWM5B/SCITXDB/ECAP3",+ "type": "bidirectional",+ "description": "General-purpose input/output 9 with alternate functions for enhanced PWM5 output B, SCI-B transmit, or enhanced capture input/output 3."+ },+ {+ "number": "40",+ "name": "GPIO28/SCIRXDA/SDAA/TZ2",+ "type": "bidirectional",+ "description": "General-purpose input/output 28 with alternate functions for SCI-A receive, I2C data open-drain bidirectional, or Trip Zone input 2."+ },+ {+ "number": "41",+ "name": "GPIO18/SPICLKA/SCITXDB/XCLKOUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 18 with alternate functions for SPI-A clock, SCI-B transmit, or output clock derived from SYSCLKOUT."+ },+ {+ "number": "42",+ "name": "GPIO17/SPISOMIA/TZ3",+ "type": "bidirectional",+ "description": "General-purpose input/output 17 with alternate functions for SPI-A master-in slave-out or Trip Zone input 3."+ },+ {+ "number": "43",+ "name": "GPIO8/EPWM5A/ADCSOCAO",+ "type": "bidirectional",+ "description": "General-purpose input/output 8 with alternate functions for enhanced PWM5 output A and HRPWM channel or ADC start-of-conversion A."+ },+ {+ "number": "44",+ "name": "GPIO16/SPISIMOA/TZ2",+ "type": "bidirectional",+ "description": "General-purpose input/output 16 with alternate functions for SPI-A master-out slave-in or Trip Zone input 2."+ },+ {+ "number": "45",+ "name": "GPIO7/EPWM4B/SCIRXDA/ECAP2",+ "type": "bidirectional",+ "description": "General-purpose input/output 7 with alternate functions for enhanced PWM4 output B, SCI-A receive, or enhanced capture input/output 2."+ },+ {+ "number": "46",+ "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",+ "type": "bidirectional",+ "description": "General-purpose input/output 6 with alternate functions for enhanced PWM4 output A and HRPWM channel, enhanced PWM sync pulse input, or output."+ },+ {+ "number": "47",+ "name": "X2",+ "type": "output",+ "description": "On-chip crystal-oscillator output; quartz crystal or ceramic resonator connected across X1 and X2, left unconnected if not used."+ },+ {+ "number": "48",+ "name": "X1",+ "type": "input",+ "description": "On-chip 1.8-V crystal-oscillator input; quartz crystal or ceramic resonator connected across X1 and X2, tied to GND if not used."+ },+ {+ "number": "49",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "50",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "51",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "52",+ "name": "GPIO19/XCLKIN/SPISTEA/SCIRXDB/ECAP1",+ "type": "bidirectional",+ "description": "General-purpose input/output 19 with alternate functions for external oscillator input, SPI-A transmit enable, SCI-B receive, or enhanced capture input/output 1."+ },+ {+ "number": "53",+ "name": "GPIO39",+ "type": "bidirectional",+ "description": "General-purpose input/output 39."+ },+ {+ "number": "54",+ "name": "GPIO38/XCLKIN/TCK",+ "type": "bidirectional",+ "description": "General-purpose input/output 38 with alternate functions for external oscillator input or JTAG test clock with internal pullup."+ },+ {+ "number": "55",+ "name": "GPIO34/COMP2OUT/COMP3OUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 34 with alternate output functions for Comparator 2 or Comparator 3 direct outputs."+ },+ {+ "number": "56",+ "name": "GPIO37/TDO",+ "type": "tri_state",+ "description": "General-purpose input/output 37 with alternate function as JTAG scan out, test data output; contents of selected register shifted on TCK falling edge with 8-mA drive."+ },+ {+ "number": "57",+ "name": "GPIO35/TDI",+ "type": "input",+ "description": "General-purpose input/output 35 with alternate function as JTAG test data input; clocked into selected register on TCK rising edge with internal pullup."+ },+ {+ "number": "58",+ "name": "GPIO36/TMS",+ "type": "input",+ "description": "General-purpose input/output 36 with alternate function as JTAG test-mode select; clocked into TAP controller on TCK rising edge with internal pullup."+ },+ {+ "number": "59",+ "name": "GPIO11/EPWM6B/SCIRXDB/ECAP1",+ "type": "bidirectional",+ "description": "General-purpose input/output 11 with alternate functions for enhanced PWM6 output B, SCI-B receive, or enhanced capture input/output 1."+ },+ {+ "number": "60",+ "name": "GPIO10/EPWM6A/ADCSOCBO",+ "type": "bidirectional",+ "description": "General-purpose input/output 10 with alternate functions for enhanced PWM6 output A and HRPWM channel or ADC start-of-conversion B."+ },+ {+ "number": "61",+ "name": "GPIO27/HRCAP2/EQEP2S/SPISTEB/USB0DM",+ "type": "bidirectional",+ "description": "General-purpose input/output 27 with alternate functions for high-resolution input capture 2, enhanced QEP2 strobe, SPI-B transmit enable, or USB negative differential signal."+ },+ {+ "number": "62",+ "name": "GPIO26/ECAP3/EQEP2I/SPICLKB/USB0DP",+ "type": "bidirectional",+ "description": "General-purpose input/output 26 with alternate functions for enhanced capture input/output 3, enhanced QEP2 index, SPI-B clock, or USB positive differential signal."+ },+ {+ "number": "63",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "64",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "65",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "66",+ "name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 3 with alternate functions for enhanced PWM2 output B, SPI-A master-in slave-out, or Comparator 2 direct output."+ },+ {+ "number": "67",+ "name": "GPIO2/EPWM2A",+ "type": "bidirectional",+ "description": "General-purpose input/output 2 with alternate function as enhanced PWM2 output A and HRPWM channel."+ },+ {+ "number": "68",+ "name": "GPIO1/EPWM1B/COMP1OUT",+ "type": "bidirectional",+ "description": "General-purpose input/output 1 with alternate functions for enhanced PWM1 output B or Comparator 1 direct output."+ },+ {+ "number": "69",+ "name": "GPIO0/EPWM1A",+ "type": "bidirectional",+ "description": "General-purpose input/output 0 with alternate function as enhanced PWM1 output A and HRPWM channel."+ },+ {+ "number": "70",+ "name": "GPIO15/ECAP2/SCIRXDB/SPISTEB",+ "type": "bidirectional",+ "description": "General-purpose input/output 15 with alternate functions for enhanced capture input/output 2, SCI-B receive, or SPI-B transmit enable."+ },+ {+ "number": "71",+ "name": "VREGENZ",+ "type": "input",+ "description": "Internal voltage regulator enable with internal pulldown; tie to VSS to enable 1.8-V VREG or tie to VDDIO to disable VREG and use external 1.8-V supply."+ },+ {+ "number": "72",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital power pin."+ },+ {+ "number": "73",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground pin."+ },+ {+ "number": "74",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffers power pin for single supply source when VREG is enabled."+ },+ {+ "number": "75",+ "name": "GPIO13/TZ2/SPISOMIB",+ "type": "bidirectional",+ "description": "General-purpose input/output 13 with alternate functions for Trip Zone input 2 or SPI-B master-in slave-out."+ },+ {+ "number": "76",+ "name": "GPIO14/TZ3/SCITXDB/SPICLKB",+ "type": "bidirectional",+ "description": "General-purpose input/output 14 with alternate functions for Trip Zone input 3, SCI-B transmit, or SPI-B clock."+ },+ {+ "number": "77",+ "name": "GPIO24/ECAP1/EQEP2A/SPISIMOB",+ "type": "bidirectional",+ "description": "General-purpose input/output 24 with alternate functions for enhanced capture input/output 1, enhanced QEP2 input A, or SPI-B master-out slave-in."+ },+ {+ "number": "78",+ "name": "GPIO22/EQEP1S/MCLKXA/SCITXDB",+ "type": "bidirectional",+ "description": "General-purpose input/output 22 with alternate functions for enhanced QEP1 strobe, McBSP transmit clock, or SCI-B transmit data."+ },+ {+ "number": "79",+ "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",+ "type": "bidirectional",+ "description": "General-purpose input/output 32 with alternate functions for I2C data open-drain bidirectional, enhanced PWM external sync pulse input, or ADC start-of-conversion A."+ },+ {+ "number": "80",+ "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",+ "type": "bidirectional",+ "description": "General-purpose input/output 33 with alternate functions for I2C clock open-drain bidirectional, enhanced PWM external sync pulse output, or ADC start-of-conversion B."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 19 and 21 note mutual exclusivity and special connections per datasheet footnotes A and B on pag; GPIO pins with multiple alternate peripheral functions may require careful mux configuration; JTAG p; USB pins (GPIO26 and GPIO27 on pins 62 and 61) require USBIOEN bit in GPACTRL2 register to enable fu"+ ],+ "pages_sent": 43,+ "cost_usd": 0.5143,+ "at": "2026-10-06T03:19:55"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tms320f28062f",+ "pages": 206,+ "sha256": "3033efed856fc72a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 80,+ "described": 80,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}