component
TMS320F28054MPNT
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTMS320F28054MPNT
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)
TMS320F28054MPNT from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO22 | bidirectional | General-purpose I/O 22, multiplexed with EQEP1S (I/O) and SCITXDB (O) alternate functions. |
| 2 | GPIO32 | bidirectional | General-purpose I/O 32, multiplexed with SDAA (I2C data, open-drain), EPWMSYNCI (input) and EQEP1S (I/O) alternate functions. |
| 3 | GPIO33 | bidirectional | General-purpose I/O 33, multiplexed with SCLA (I2C clock, open-drain), EPWMSYNCO (output) and EQEP1I (I/O) alternate functions. |
| 4 | GPIO24 | bidirectional | General-purpose I/O 24 with internal pullup enabled by default, multiplexed with ECAP1 (I/O) and EPWM7A (output) alternate functions. |
| 5 | GPIO42 | bidirectional | General-purpose I/O 42 with internal pullup enabled by default, multiplexed with EPWM7B (output), SCITXDC (output) and CTRIPM1OUT (output) alternate functions. |
| 6 | VDD | power_in | CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground (higher values may be used). |
| 7 | VSS | power_in | Digital ground pin. |
| 8 | XRS | bidirectional | Open-drain device reset input/watchdog reset output with internal pullup; a 2.2 kΩ to 10 kΩ resistor to VDDIO is required and any capacitor to VSS should be 100 nF or smaller. |
| 9 | TRST | input | JTAG test reset with internal pulldown that must be kept low during normal device operation; an external pulldown resistor is required (2.2 kΩ generally offers adequate protection). |
| 10 | ADCINA5 | input | ADC Group A, Channel 5 analog input. |
| 11 | ADCINA4 | input | ADC Group A, Channel 4 analog input. |
| 12 | ADCINA3 | input | ADC Group A, Channel 3 analog input (op-amp channel). |
| 13 | ADCINA2 | input | ADC Group A, Channel 2 analog input. |
| 14 | ADCINA1 | input | ADC Group A, Channel 1 analog input (op-amp channel). |
| 15 | M1GND | power_in | Ground pin for amplifier channels A1, A3 and B1. |
| 16 | ADCINB2 | input | ADC Group B, Channel 2 analog input. |
| 17 | ADCINB1 | input | ADC Group B, Channel 1 analog input (op-amp channel). |
| 18 | ADCINA0/VREFOUT | input | ADC Group A, Channel 0 analog input; the same pin is also the voltage reference output from the buffered DAC (VREFOUT). |
| 19 | VREFHI | input | ADC external reference input, used in ADC external reference mode and as the VREFOUT reference. |
| 20 | VDDA | power_in | Analog power pin; tie with a 2.2-µF capacitor (typical) close to the pin. |
| 21 | VSSA | power_in | Analog ground pin. |
| 22 | VREFLO | power_in | ADC low reference, always tied to ground. |
| 23 | ADCINA6 | input | ADC Group A, Channel 6 analog input (op-amp channel). |
| 24 | ADCINA7 | input | ADC Group A, Channel 7 analog input. |
| 25 | ADCINB3 | input | ADC Group B, Channel 3 analog input. |
| 26 | ADCINB4 | input | ADC Group B, Channel 4 analog input (op-amp channel). |
| 27 | M2GND | power_in | Ground pin for amplifier channels A6, B4 and B6. |
| 28 | ADCINB5 | input | ADC Group B, Channel 5 analog input. |
| 29 | ADCINB6 | input | ADC Group B, Channel 6 analog input (op-amp channel). |
| 30 | ADCINB0 | input | ADC Group B, Channel 0 analog input. |
| 31 | ADCINB7 | input | ADC Group B, Channel 7 analog input (op-amp channel). |
| 32 | PFCGND | power_in | Ground pin for amplifier channel B7. |
| 33 | GPIO27 | bidirectional | General-purpose I/O 27, multiplexed with SCITXDC (output) alternate function. |
| 34 | GPIO31 | bidirectional | General-purpose I/O 31 with internal pullup enabled by default, multiplexed with CANTXA (output), SCITXDB (output) and EPWM7B (output) alternate functions. |
| 35 | GPIO30 | bidirectional | General-purpose I/O 30 with internal pullup enabled by default, multiplexed with CANRXA (input), SCIRXDB (input) and EPWM7A (output) alternate functions. |
| 36 | GPIO9 | bidirectional | General-purpose I/O 9, multiplexed with EPWM5B (output) and SCITXDB (output) alternate functions. |
| 37 | VSS | power_in | Digital ground pin. |
| 38 | VDDIO | power_in | Digital I/O buffer and flash memory power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin. |
| 39 | TEST2 | bidirectional | Test pin reserved for TI; must be left unconnected. |
| 40 | GPIO26 | bidirectional | General-purpose I/O 26, multiplexed with SCIRXDC (input) alternate function. |
| 41 | GPIO29 | bidirectional | General-purpose I/O 29, multiplexed with SCITXDA (output), SCLA (I2C clock, open-drain), TZ3 (input) and CTRIPPFCOUT (output) alternate functions. |
| 42 | GPIO28 | bidirectional | General-purpose I/O 28, multiplexed with SCIRXDA (input), SDAA (I2C data, open-drain) and TZ2 (input) alternate functions. |
| 43 | GPIO18 | bidirectional | General-purpose I/O 18, multiplexed with SPICLKA (I/O), SCITXDB (output) and XCLKOUT (output derived from SYSCLKOUT; XCLKOUT = SYSCLKOUT/4 at reset). |
| 44 | GPIO17 | bidirectional | General-purpose I/O 17, multiplexed with SPISOMIA (I/O), EQEP1I (I/O), TZ3 (input) and CTRIPPFCOUT (output) alternate functions. |
| 45 | GPIO8 | bidirectional | General-purpose I/O 8, multiplexed with EPWM5A (output) and ADCSOCAO (output) alternate functions. |
| 46 | GPIO25 | bidirectional | General-purpose I/O 25 with no alternate peripheral functions listed. |
| 47 | GPIO16 | bidirectional | General-purpose I/O 16, multiplexed with SPISIMOA (I/O), EQEP1S (I/O) and TZ2 (input) alternate functions. |
| 48 | GPIO12 | bidirectional | General-purpose I/O 12, multiplexed with TZ1 (input), CTRIPM1OUT (output) and SCITXDA (output) alternate functions. |
| 49 | GPIO7 | bidirectional | General-purpose I/O 7, multiplexed with EPWM4B (output) and SCIRXDA (input) alternate functions. |
| 50 | GPIO6 | bidirectional | General-purpose I/O 6, multiplexed with EPWM4A (output), EPWMSYNCI (input) and EPWMSYNCO (output) alternate functions. |
| 51 | X2 | output | On-chip crystal-oscillator output; a quartz crystal or ceramic resonator is connected across X1 and X2, and X2 must be left unconnected if not used. |
| 52 | X1 | input | On-chip 1.8-V crystal-oscillator input; must be tied to GND if the crystal oscillator is not used. |
| 53 | VSS | power_in | Digital ground pin. |
| 54 | VDD | power_in | CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground (higher values may be used). |
| 55 | GPIO19 | bidirectional | General-purpose I/O 19, multiplexed with XCLKIN (external oscillator input), SPISTEA (I/O), SCIRXDB (input) and ECAP1 (I/O) alternate functions. |
| 56 | GPIO39 | bidirectional | General-purpose I/O 39, multiplexed with SCIRXDC (input) and CTRIPPFCOUT (output) alternate functions. |
| 57 | GPIO38 | bidirectional | General-purpose I/O 38, multiplexed with XCLKIN (external oscillator input) and TCK (JTAG test clock with internal pullup); the default selection for XCLKIN. |
| 58 | GPIO37 | bidirectional | General-purpose I/O 37, which is also the JTAG TDO scan output (8 mA drive). |
| 59 | GPIO35 | bidirectional | General-purpose I/O 35, which is also the JTAG TDI test data input with internal pullup. |
| 60 | GPIO36 | bidirectional | General-purpose I/O 36, which is also the JTAG TMS test-mode select input with internal pullup. |
| 61 | GPIO11 | bidirectional | General-purpose I/O 11, multiplexed with EPWM6B (output) and SCIRXDB (input) alternate functions. |
| 62 | GPIO5 | bidirectional | General-purpose I/O 5, multiplexed with EPWM3B (output), SPISIMOA (I/O) and ECAP1 (I/O) alternate functions. |
| 63 | GPIO4 | bidirectional | General-purpose I/O 4, multiplexed with EPWM3A (output) alternate function. |
| 64 | GPIO40 | bidirectional | General-purpose I/O 40 with internal pullup enabled by default, multiplexed with EPWM7A (output) alternate function. |
| 65 | GPIO10 | bidirectional | General-purpose I/O 10, multiplexed with EPWM6A (output) and ADCSOCBO (output) alternate functions. |
| 66 | GPIO3 | bidirectional | General-purpose I/O 3, multiplexed with EPWM2B (output) and SPISOMIA (I/O) alternate functions. |
| 67 | GPIO2 | bidirectional | General-purpose I/O 2, multiplexed with EPWM2A (output) alternate function. |
| 68 | GPIO1 | bidirectional | General-purpose I/O 1, multiplexed with EPWM1B (output) and CTRIPM1OUT (output) alternate functions. |
| 69 | GPIO0 | bidirectional | General-purpose I/O 0, multiplexed with EPWM1A (output) alternate function. |
| 70 | VDDIO | power_in | Digital I/O buffer and flash memory power pin; single supply source when VREG is enabled, with a decoupling capacitor on each pin. |
| 71 | VREGENZ | input | Internal VREG enable with internal pulldown: tie to VSS to enable the internal 1.8-V VREG, or to VDDIO to disable it and use an external 1.8-V supply. |
| 72 | VSS | power_in | Digital ground pin. |
| 73 | VDD | power_in | CPU and logic digital power pin; when using the internal VREG, place one 1.2-µF capacitor between each VDD pin and ground (higher values may be used). |
| 74 | GPIO34 | bidirectional | General-purpose I/O 34, multiplexed with CTRIPPFCOUT (output) alternate function; its I/O is not glitch-free during power-up. |
| 75 | GPIO15 | bidirectional | General-purpose I/O 15, multiplexed with TZ1 (input), CTRIPM1OUT (output) and SCIRXDB (input) alternate functions. |
| 76 | GPIO13 | bidirectional | General-purpose I/O 13, multiplexed with TZ2 (input) alternate function. |
| 77 | GPIO14 | bidirectional | General-purpose I/O 14, multiplexed with TZ3 (input), CTRIPPFCOUT (output) and SCITXDB (output) alternate functions. |
| 78 | GPIO20 | bidirectional | General-purpose I/O 20 with internal pullup enabled by default, multiplexed with EQEP1A (input), EPWM7A (output) and CTRIPM1OUT (output) alternate functions. |
| 79 | GPIO21 | bidirectional | General-purpose I/O 21 with internal pullup enabled by default, multiplexed with EQEP1B (input) and EPWM7B (output) alternate functions. |
| 80 | GPIO23 | bidirectional | General-purpose I/O 23, multiplexed with EQEP1I (I/O) and SCIRXDB (input) alternate functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-80(12x12) |
| Category | Embedded Processors & Controllers |
| Pins | 80 |
CAD (KiCad official)
- Symbol:
TMS320F28054MPNT - Footprint:
Package_QFP:LQFP-80_12x12mm_P0.5mm - 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
- 3D model files:
tms320f28054mpnt-etched.step/tms320f28054mpnt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tms320f28054mpnt.step/tms320f28054mpnt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (159 pp, sha256
aaaaedb6c548633c, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).