TMS320F28035PNTR

{
  "schema_version": 1,
  "type": "component",
  "slug": "tms320f28035pntr",
  "title": "TMS320F28035PNTR",
  "brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "mcu",
    "tms320f28035pntr"
  ],
  "component": {
    "mpn": "TMS320F28035PNTR",
    "manufacturer": "Texas Instruments",
    "package": "LQFP-80(12x12)",
    "pin_count": 80,
    "category": "MCU",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302211930_Texas-Instruments-TMS320F28035PNTR_C2055860.pdf",
    "parts": {
      "symbol": "tms320f28035pntr.kicad_sym",
      "footprint": "tms320f28035pntr.kicad_mod",
      "model_3d": "tms320f28035pntr-etched.glb",
      "model_3d_plain": "tms320f28035pntr.glb",
      "model_3d_step": "tms320f28035pntr-etched.step",
      "model_3d_step_plain": "tms320f28035pntr.step",
      "lbr": "tms320f28035pntr.lbr"
    },
    "distributor_links": {
      "digikey": "TMS320F28035PNTR-ND",
      "lcsc": "C2055860"
    },
    "pins": [
      {
        "number": "1",
        "name": "GPIO22/EQEP1S/LINTXA",
        "type": "bidirectional",
        "description": "GPIO22. Alt: enhanced QEP1 strobe (EQEP1S, I/O), LIN transmit A (LINTXA, O). Internal pull-up enabled after reset."
      },
      {
        "number": "2",
        "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",
        "type": "bidirectional",
        "description": "GPIO32. Alt: I2C-A data open-drain (SDAA, I/OD), ePWM external sync input (EPWMSYNCI, I), ADC start-of-conversion A (ADCSOCAO, O)."
      },
      {
        "number": "3",
        "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",
        "type": "bidirectional",
        "description": "GPIO33. Alt: I2C-A clock open-drain (SCLA, I/OD), ePWM external sync output (EPWMSYNCO, O), ADC start-of-conversion B (ADCSOCBO, O)."
      },
      {
        "number": "4",
        "name": "GPIO23/EQEP1I/LINRXA",
        "type": "bidirectional",
        "description": "GPIO23. Alt: enhanced QEP1 index (EQEP1I, I/O), LIN receive A (LINRXA, I)."
      },
      {
        "number": "5",
        "name": "GPIO42/COMP1OUT",
        "type": "bidirectional",
        "description": "GPIO42. Alt: comparator 1 direct output (COMP1OUT, O)."
      },
      {
        "number": "6",
        "name": "GPIO43/COMP2OUT",
        "type": "bidirectional",
        "description": "GPIO43. Alt: comparator 2 direct output (COMP2OUT, O)."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital 1.8 V supply. Place a 1.2 µF (or larger) decoupling capacitor between each VDD pin and ground when using the internal VREG."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "9",
        "name": "XRS",
        "type": "bidirectional",
        "description": "Device reset input and watchdog reset output. Open-drain with internal pull-up; connect a 2.2 kΩ-10 kΩ pull-up to VDDIO. Optional 100 nF or smaller noise-filter cap to VSS."
      },
      {
        "number": "10",
        "name": "TRST",
        "type": "input",
        "description": "JTAG test reset with internal pull-down. Must be held low during normal device operation; requires external pull-up (typically 2.2 kΩ) to activate JTAG. Active-high test pin."
      },
      {
        "number": "11",
        "name": "ADCINA7/ADCINA6",
        "type": "input",
        "description": "ADC group A, channel 7 input (also channel 6 input on this pin per the datasheet listing). Analog input; not 5 V tolerant."
      },
      {
        "number": "12",
        "name": "COMP3A/AIO6",
        "type": "bidirectional",
        "description": "Comparator input 3A (analog, I) / digital AIO6 (I/O). AIO pins have no internal pull-up."
      },
      {
        "number": "13",
        "name": "ADCINA5/ADCINA4",
        "type": "input",
        "description": "ADC group A, channel 5 input (also channel 4 input). Analog input; not 5 V tolerant."
      },
      {
        "number": "14",
        "name": "COMP2A/AIO4",
        "type": "bidirectional",
        "description": "Comparator input 2A (I) / digital AIO4 (I/O). AIO pins have no internal pull-up."
      },
      {
        "number": "15",
        "name": "ADCINA3/ADCINA2",
        "type": "input",
        "description": "ADC group A, channel 3 input (also channel 2 input). Analog input; not 5 V tolerant."
      },
      {
        "number": "16",
        "name": "COMP1A/AIO2",
        "type": "bidirectional",
        "description": "Comparator input 1A (I) / digital AIO2 (I/O). AIO pins have no internal pull-up."
      },
      {
        "number": "17",
        "name": "ADCINA1",
        "type": "input",
        "description": "ADC group A, channel 1 input. Analog input; not 5 V tolerant."
      },
      {
        "number": "18",
        "name": "ADCINA0",
        "type": "input",
        "description": "ADC group A, channel 0 input. On 80-pin PN, ADCINA0 has a dedicated pin (VREFHI is separate)."
      },
      {
        "number": "19",
        "name": "VREFHI",
        "type": "input",
        "description": "ADC external reference high - used only in ADC external reference mode. Dedicated pin on the 80-pin PN package."
      },
      {
        "number": "20",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog 3.3 V supply. Place a ~2.2 µF decoupling capacitor near this pin."
      },
      {
        "number": "21",
        "name": "VSSA",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "22",
        "name": "VREFLO",
        "type": "input",
        "description": "ADC external reference low. Typically tied to VSSA."
      },
      {
        "number": "23",
        "name": "ADCINB0",
        "type": "input",
        "description": "ADC group B, channel 0 input."
      },
      {
        "number": "24",
        "name": "ADCINB1",
        "type": "input",
        "description": "ADC group B, channel 1 input."
      },
      {
        "number": "25",
        "name": "COMP1B/AIO10",
        "type": "bidirectional",
        "description": "Comparator input 1B (I) / digital AIO10 (I/O)."
      },
      {
        "number": "26",
        "name": "ADCINB3/ADCINB2",
        "type": "input",
        "description": "ADC group B, channel 3 input (also channel 2 input)."
      },
      {
        "number": "27",
        "name": "COMP2B/AIO12",
        "type": "bidirectional",
        "description": "Comparator input 2B (I) / digital AIO12 (I/O)."
      },
      {
        "number": "28",
        "name": "ADCINB5/ADCINB4",
        "type": "input",
        "description": "ADC group B, channel 5 input (also channel 4 input)."
      },
      {
        "number": "29",
        "name": "COMP3B/AIO14",
        "type": "bidirectional",
        "description": "Comparator input 3B (I) / digital AIO14 (I/O)."
      },
      {
        "number": "30",
        "name": "ADCINB7/ADCINB6",
        "type": "input",
        "description": "ADC group B, channel 7 input (also channel 6 input)."
      },
      {
        "number": "31",
        "name": "GPIO27/HRCAP2/SPISTEB",
        "type": "bidirectional",
        "description": "GPIO27. Alt: high-resolution input capture 2 (HRCAP2, I), SPI-B slave transmit enable (SPISTEB, I/O)."
      },
      {
        "number": "32",
        "name": "GPIO31/CANTXA",
        "type": "bidirectional",
        "description": "GPIO31. Alt: CAN transmit A (CANTXA, O)."
      },
      {
        "number": "33",
        "name": "GPIO30/CANRXA",
        "type": "bidirectional",
        "description": "GPIO30. Alt: CAN receive A (CANRXA, I)."
      },
      {
        "number": "34",
        "name": "GPIO29/SCITXDA/SCLA/TZ3",
        "type": "bidirectional",
        "description": "GPIO29. Alt: SCI-A transmit data (SCITXDA, O), I2C-A clock open-drain (SCLA, I/OD), trip-zone input 3 (TZ3, I)."
      },
      {
        "number": "35",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "36",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash 3.3 V supply. Place a decoupling capacitor at each VDDIO pin."
      },
      {
        "number": "37",
        "name": "GPIO26/HRCAP1/SPICLKB",
        "type": "bidirectional",
        "description": "GPIO26. Alt: high-resolution input capture 1 (HRCAP1, I), SPI-B clock (SPICLKB, I/O)."
      },
      {
        "number": "38",
        "name": "TEST2",
        "type": "bidirectional",
        "description": "Test pin reserved by TI. Must be left unconnected."
      },
      {
        "number": "39",
        "name": "GPIO9/EPWM5B/LINTXA/HRCAP1",
        "type": "bidirectional",
        "description": "GPIO9. Alt: enhanced PWM5 output B (EPWM5B, O), LIN transmit A (LINTXA, O), high-resolution input capture 1 (HRCAP1, I)."
      },
      {
        "number": "40",
        "name": "GPIO28/SCIRXDA/SDAA/TZ2",
        "type": "bidirectional",
        "description": "GPIO28. Alt: SCI-A receive data (SCIRXDA, I), I2C-A data open-drain (SDAA, I/OD), trip-zone input 2 (TZ2, I)."
      },
      {
        "number": "41",
        "name": "GPIO18/SPICLKA/LINTXA/XCLKOUT",
        "type": "bidirectional",
        "description": "GPIO18. Alt: SPI-A clock (SPICLKA, I/O), LIN transmit A (LINTXA, O), external clock output (XCLKOUT, O/Z) sourced from SYSCLKOUT with 1x/½/¼ divider."
      },
      {
        "number": "42",
        "name": "GPIO17/SPISOMIA/TZ3",
        "type": "bidirectional",
        "description": "GPIO17. Alt: SPI-A slave-out master-in (SPISOMIA, I/O), trip-zone input 3 (TZ3, I)."
      },
      {
        "number": "43",
        "name": "GPIO8/EPWM5A/ADCSOCAO",
        "type": "bidirectional",
        "description": "GPIO8. Alt: enhanced PWM5 output A and HRPWM channel (EPWM5A, O), ADC start-of-conversion A (ADCSOCAO, O)."
      },
      {
        "number": "44",
        "name": "GPIO25/SPISOMIB",
        "type": "bidirectional",
        "description": "GPIO25. Alt: SPI-B slave-out master-in (SPISOMIB, I/O). SPI-B is available on PN and RSH packages only."
      },
      {
        "number": "45",
        "name": "GPIO44",
        "type": "bidirectional",
        "description": "GPIO44 (no additional peripheral aliases on this pin)."
      },
      {
        "number": "46",
        "name": "GPIO16/SPISIMOA/TZ2",
        "type": "bidirectional",
        "description": "GPIO16. Alt: SPI-A slave-in master-out (SPISIMOA, I/O), trip-zone input 2 (TZ2, I)."
      },
      {
        "number": "47",
        "name": "GPIO12/TZ1/SCITXDA/SPISIMOB",
        "type": "bidirectional",
        "description": "GPIO12. Alt: trip-zone input 1 (TZ1, I), SCI-A transmit data (SCITXDA, O), SPI-B slave-in master-out (SPISIMOB, I/O; PN package only)."
      },
      {
        "number": "48",
        "name": "GPIO41/EPWM7B",
        "type": "bidirectional",
        "description": "GPIO41. Alt: enhanced PWM7 output B (EPWM7B, O)."
      },
      {
        "number": "49",
        "name": "GPIO7/EPWM4B/SCIRXDA",
        "type": "bidirectional",
        "description": "GPIO7. Alt: enhanced PWM4 output B (EPWM4B, O), SCI-A receive data (SCIRXDA, I)."
      },
      {
        "number": "50",
        "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",
        "type": "bidirectional",
        "description": "GPIO6. Alt: enhanced PWM4 output A and HRPWM channel (EPWM4A, O), external ePWM sync input (EPWMSYNCI, I), external ePWM sync output (EPWMSYNCO, O)."
      },
      {
        "number": "51",
        "name": "X2",
        "type": "output",
        "description": "On-chip crystal oscillator output. Connect a quartz crystal or ceramic resonator between X1 and X2, or leave unconnected if not used."
      },
      {
        "number": "52",
        "name": "X1",
        "type": "input",
        "description": "1.8 V on-chip crystal oscillator input. Connect a quartz crystal or ceramic resonator between X1 and X2. Tie to GND if unused. Disable XCLKIN path via CLKCTL bit 13 when using the crystal."
      },
      {
        "number": "53",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "54",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital 1.8 V supply. 1.2 µF (or larger) decoupling per pin when using internal VREG."
      },
      {
        "number": "55",
        "name": "GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1",
        "type": "bidirectional",
        "description": "GPIO19. Alt: external oscillator input (XCLKIN, I; path not gated by pin mux), SPI-A slave transmit enable (SPISTEA, I/O), LIN receive A (LINRXA, I), enhanced capture 1 (ECAP1, I/O)."
      },
      {
        "number": "56",
        "name": "GPIO39",
        "type": "bidirectional",
        "description": "GPIO39 (no additional peripheral aliases on this pin)."
      },
      {
        "number": "57",
        "name": "GPIO38/TCK/XCLKIN",
        "type": "bidirectional",
        "description": "GPIO38 default at reset is JTAG TCK (test clock, with internal pull-up). Also can serve as external clock input (XCLKIN). Selected via TRST behavior and CLKCTL/XCLK registers."
      },
      {
        "number": "58",
        "name": "GPIO37/TDO",
        "type": "bidirectional",
        "description": "GPIO37 default is JTAG TDO (test data output, O/Z, 8 mA drive). Contents of selected register shifted out on falling edge of TCK."
      },
      {
        "number": "59",
        "name": "GPIO35/TDI",
        "type": "bidirectional",
        "description": "GPIO35 default is JTAG TDI (test data input, with internal pull-up). Clocked into selected register on rising edge of TCK."
      },
      {
        "number": "60",
        "name": "GPIO36/TMS",
        "type": "bidirectional",
        "description": "GPIO36 default is JTAG TMS (test mode select, with internal pull-up). Clocked into TAP controller on rising edge of TCK."
      },
      {
        "number": "61",
        "name": "GPIO11/EPWM6B/LINRXA/HRCAP2",
        "type": "bidirectional",
        "description": "GPIO11. Alt: enhanced PWM6 output B (EPWM6B, O), LIN receive A (LINRXA, I), high-resolution input capture 2 (HRCAP2, I)."
      },
      {
        "number": "62",
        "name": "GPIO5/EPWM3B/SPISIMOA/ECAP1",
        "type": "bidirectional",
        "description": "GPIO5. Alt: enhanced PWM3 output B (EPWM3B, O), SPI-A slave-in master-out (SPISIMOA, I/O), enhanced capture 1 (ECAP1, I/O)."
      },
      {
        "number": "63",
        "name": "GPIO4/EPWM3A",
        "type": "bidirectional",
        "description": "GPIO4. Alt: enhanced PWM3 output A and HRPWM channel (EPWM3A, O)."
      },
      {
        "number": "64",
        "name": "GPIO40/EPWM7A",
        "type": "bidirectional",
        "description": "GPIO40. Alt: enhanced PWM7 output A (EPWM7A, O)."
      },
      {
        "number": "65",
        "name": "GPIO10/EPWM6A/ADCSOCBO",
        "type": "bidirectional",
        "description": "GPIO10. Alt: enhanced PWM6 output A and HRPWM channel (EPWM6A, O), ADC start-of-conversion B (ADCSOCBO, O)."
      },
      {
        "number": "66",
        "name": "GPIO3/EPWM2B/SPISOMIA/COMP2OUT",
        "type": "bidirectional",
        "description": "GPIO3. Alt: enhanced PWM2 output B (EPWM2B, O), SPI-A slave-out master-in (SPISOMIA, I/O), comparator 2 direct output (COMP2OUT, O)."
      },
      {
        "number": "67",
        "name": "GPIO2/EPWM2A",
        "type": "bidirectional",
        "description": "GPIO2. Alt: enhanced PWM2 output A and HRPWM channel (EPWM2A, O)."
      },
      {
        "number": "68",
        "name": "GPIO1/EPWM1B/COMP1OUT",
        "type": "bidirectional",
        "description": "GPIO1. Alt: enhanced PWM1 output B (EPWM1B, O), comparator 1 direct output (COMP1OUT, O)."
      },
      {
        "number": "69",
        "name": "GPIO0/EPWM1A",
        "type": "bidirectional",
        "description": "GPIO0. Alt: enhanced PWM1 output A and HRPWM channel (EPWM1A, O)."
      },
      {
        "number": "70",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Digital I/O buffer and flash 3.3 V supply. Place a decoupling capacitor at each VDDIO pin."
      },
      {
        "number": "71",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground."
      },
      {
        "number": "72",
        "name": "VDD",
        "type": "power_in",
        "description": "CPU and logic digital 1.8 V supply. 1.2 µF (or larger) decoupling per pin when using internal VREG."
      },
      {
        "number": "73",
        "name": "VREGENZ",
        "type": "input",
        "description": "Internal 1.8 V VREG enable (with internal pull-down). Tie to VSS to enable the internal VREG; tie to VDDIO to disable it and supply external 1.8 V."
      },
      {
        "number": "74",
        "name": "GPIO34/COMP2OUT/COMP3OUT",
        "type": "bidirectional",
        "description": "GPIO34. Alt: comparator 2 direct output (COMP2OUT, O), comparator 3 direct output (COMP3OUT, O)."
      },
      {
        "number": "75",
        "name": "GPIO15/TZ1/LINRXA/SPISTEB",
        "type": "bidirectional",
        "description": "GPIO15. Alt: trip-zone input 1 (TZ1, I), LIN receive A (LINRXA, I), SPI-B slave transmit enable (SPISTEB, I/O)."
      },
      {
        "number": "76",
        "name": "GPIO13/TZ2/SPISOMIB",
        "type": "bidirectional",
        "description": "GPIO13. Alt: trip-zone input 2 (TZ2, I), SPI-B slave-out master-in (SPISOMIB, I/O)."
      },
      {
        "number": "77",
        "name": "GPIO14/TZ3/LINTXA/SPICLKB",
        "type": "bidirectional",
        "description": "GPIO14. Alt: trip-zone input 3 (TZ3, I), LIN transmit A (LINTXA, O), SPI-B clock (SPICLKB, I/O)."
      },
      {
        "number": "78",
        "name": "GPIO20/EQEP1A/COMP1OUT",
        "type": "bidirectional",
        "description": "GPIO20. Alt: enhanced QEP1 input A (EQEP1A, I), comparator 1 direct output (COMP1OUT, O)."
      },
      {
        "number": "79",
        "name": "GPIO21/EQEP1B/COMP2OUT",
        "type": "bidirectional",
        "description": "GPIO21. Alt: enhanced QEP1 input B (EQEP1B, I), comparator 2 direct output (COMP2OUT, O)."
      },
      {
        "number": "80",
        "name": "GPIO24/ECAP1/SPISIMOB",
        "type": "bidirectional",
        "description": "GPIO24. Alt: enhanced capture 1 (ECAP1, I/O), SPI-B slave-in master-out (SPISIMOB, I/O; PN and RSH packages only)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302211930_Texas-Instruments-TMS320F28035PNTR_C2055860.pdf",
        "pages": 169,
        "sha256": "a49f83b9ffcd2982",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 80,
        "described": 80,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "LQFP-80_12x12mm_P0.5mm@sha256:528e4841fa5e3d77",
      "mark": "drawn"
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        "footprint_binding": "identity",
        "sha256": "f782bdbc6327d920be33e2b9906695d7c3690117933775c3f145eac71f2013ac",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "origin": "footprint origin = pad-pattern centre",
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        "extents_mm": [
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        "zmin_mm": 0,
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        "footprint_binding": "identity",
        "sha256": "36e937328087915b4909368cc46f24bda3a11193703d4688bba5a93a446dba76",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "LQFP-80(12x12)",
      "Category": "MCU",
      "Pins": "80"
    }
  },
  "sections": [
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    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
    "tms320f28035pntr"
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  "discovery_pitch": "TMS320F28035PNTR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
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  "variants": [
    {
      "mpn": "TMS320F28035PNTR",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPNQ",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPNQR",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPNS",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPAG",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPAGT",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPAGQ",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRPAGS",
      "kind": "packaging"
    },
    {
      "mpn": "TMS320F28035PNTRRSH",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T11:08:55.227Z"
}