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TMS320F28035PNQ

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TMS320F28035PNQ

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)

TMS320F28035PNQ from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPIO22/EQEP1S/LINTXA bidirectional General-purpose I/O 22 (I/O/Z, internal pull-up) with eQEP1 strobe or LIN transmit A as alternate functions.
2 GPIO32/SDAA/EPWMSYNCI/ADCSOCAO bidirectional General-purpose I/O 32 with I2C data (open-drain), ePWM external sync input or ADC start-of-conversion A output alternates.
3 GPIO33/SCLA/EPWMSYNCO/ADCSOCBO bidirectional General-purpose I/O 33 with I2C clock (open-drain), ePWM external sync output or ADC start-of-conversion B output alternates.
4 GPIO23/EQEP1I/LINRXA bidirectional General-purpose I/O 23 with eQEP1 index or LIN receive A alternates.
5 GPIO42/COMP1OUT bidirectional General-purpose I/O 42 with comparator 1 direct output as alternate function.
6 GPIO43/COMP2OUT bidirectional General-purpose I/O 43 with comparator 2 direct output as alternate function.
7 VDD power_in CPU and logic digital power pin; with internal VREG place a 1.2uF capacitor between each VDD pin and ground.
8 VSS power_in Digital ground pin.
9 XRS bidirectional Device reset input and watchdog reset output (open-drain with internal pull-up); use a 2.2k-10k resistor to VDDIO and at most 100nF to VSS.
10 TRST input JTAG test reset with internal pull-down; active-high, must be held low during normal operation and needs an external pull-down (typically 2.2k).
11 ADCINA7 input ADC group A, channel 7 input.
12 ADCINA6/COMP3A/AIO6 bidirectional ADC group A channel 6 input, comparator 3A input or digital AIO6 (no internal pull-up).
13 ADCINA5 input ADC group A, channel 5 input.
14 ADCINA4/COMP2A/AIO4 bidirectional ADC group A channel 4 input, comparator 2A input or digital AIO4.
15 ADCINA3 input ADC group A, channel 3 input.
16 ADCINA2/COMP1A/AIO2 bidirectional ADC group A channel 2 input, comparator 1A input or digital AIO2.
17 ADCINA1 input ADC group A, channel 1 input.
18 ADCINA0 input ADC group A, channel 0 input (separate pin from VREFHI on the 80-pin PN package).
19 VREFHI input ADC external reference high, used only in ADC external reference mode and must not exceed VDDA.
20 VDDA power_in Analog power pin; connect a 2.2uF (typical) capacitor near this pin, recommended 2.97V to 3.63V.
21 VSSA power_in Analog ground pin.
22 VREFLO input ADC external reference low.
23 ADCINB0 input ADC group B, channel 0 input.
24 ADCINB1 input ADC group B, channel 1 input.
25 ADCINB2/COMP1B/AIO10 bidirectional ADC group B channel 2 input, comparator 1B input or digital AIO10.
26 ADCINB3 input ADC group B, channel 3 input.
27 ADCINB4/COMP2B/AIO12 bidirectional ADC group B channel 4 input, comparator 2B input or digital AIO12.
28 ADCINB5 input ADC group B, channel 5 input.
29 ADCINB6/COMP3B/AIO14 bidirectional ADC group B channel 6 input, comparator 3B input or digital AIO14.
30 ADCINB7 input ADC group B, channel 7 input.
31 GPIO27/HRCAP2/SPISTEB bidirectional General-purpose I/O 27 with high-resolution capture 2 input or SPI-B slave transmit enable alternates.
32 GPIO31/CANTXA bidirectional General-purpose I/O 31 with CAN transmit as alternate function.
33 GPIO30/CANRXA bidirectional General-purpose I/O 30 with CAN receive as alternate function.
34 GPIO29/SCITXDA/SCLA/TZ3 bidirectional General-purpose I/O 29 (group 2, 8mA) with SCI transmit, I2C clock (open-drain) or trip zone 3 alternates.
35 VSS power_in Digital ground pin.
36 VDDIO power_in Digital I/O buffer and flash supply pin, recommended 2.97V to 3.63V, with a decoupling capacitor at each pin.
37 GPIO26/HRCAP1/SPICLKB bidirectional General-purpose I/O 26 with high-resolution capture 1 input or SPI-B clock alternates.
38 TEST2 bidirectional Test pin reserved for TI; must be left unconnected.
39 GPIO9/EPWM5B/LINTXA/HRCAP1 bidirectional General-purpose I/O 9 with ePWM5 output B, LIN transmit A or HRCAP1 input alternates.
40 GPIO28/SCIRXDA/SDAA/TZ2 bidirectional General-purpose I/O 28 (group 2, 8mA) with SCI receive, I2C data (open-drain) or trip zone 2 alternates.
41 GPIO18/SPICLKA/LINTXA/XCLKOUT bidirectional General-purpose I/O 18 (group 2, 8mA) with SPI-A clock, LIN transmit or XCLKOUT (SYSCLKOUT, /2 or /4) alternates.
42 GPIO17/SPISOMIA/TZ3 bidirectional General-purpose I/O 17 (group 2, 8mA) with SPI-A slave-out/master-in or trip zone 3 alternates.
43 GPIO8/EPWM5A/ADCSOCAO bidirectional General-purpose I/O 8 with ePWM5 output A (HRPWM) or ADC start-of-conversion A output alternates.
44 GPIO25/SPISOMIB bidirectional General-purpose I/O 25 with SPI-B slave-out/master-in as alternate function.
45 GPIO44 bidirectional General-purpose I/O 44 with no alternate peripheral function.
46 GPIO16/SPISIMOA/TZ2 bidirectional General-purpose I/O 16 (group 2, 8mA) with SPI-A slave-in/master-out or trip zone 2 alternates.
47 GPIO12/TZ1/SCITXDA/SPISIMOB bidirectional General-purpose I/O 12 with trip zone 1, SCI transmit or SPI-B slave-in/master-out alternates.
48 GPIO41/EPWM7B bidirectional General-purpose I/O 41 with ePWM7 output B as alternate function.
49 GPIO7/EPWM4B/SCIRXDA bidirectional General-purpose I/O 7 with ePWM4 output B or SCI receive alternates.
50 GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO bidirectional General-purpose I/O 6 with ePWM4 output A (HRPWM), external sync input or sync output alternates.
51 X2 output On-chip crystal oscillator output; connect a crystal or ceramic resonator between X1 and X2, leave unconnected if unused.
52 X1 input 1.8V on-chip crystal oscillator input; connect crystal/resonator between X1 and X2, connect to GND if unused.
53 VSS power_in Digital ground pin.
54 VDD power_in CPU and logic digital power pin; with internal VREG place a 1.2uF capacitor between each VDD pin and ground.
55 GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1 bidirectional General-purpose I/O 19 (group 2, 8mA) with external oscillator input, SPI-A slave transmit enable, LIN receive or eCAP1 alternates.
56 GPIO39 bidirectional General-purpose I/O 39 with no alternate peripheral function.
57 GPIO38/TCK/XCLKIN bidirectional General-purpose I/O 38 or JTAG test clock (internal pull-up), also selectable as external oscillator input (default XCLKIN source).
58 GPIO37/TDO bidirectional General-purpose I/O 37 (group 2) or JTAG test data output (8mA drive), also used for boot mode selection.
59 GPIO35/TDI bidirectional General-purpose I/O 35 or JTAG test data input with internal pull-up.
60 GPIO36/TMS bidirectional General-purpose I/O 36 (group 2) or JTAG test mode select with internal pull-up.
61 GPIO11/EPWM6B/LINRXA/HRCAP2 bidirectional General-purpose I/O 11 with ePWM6 output B, LIN receive A or HRCAP2 input alternates.
62 GPIO5/EPWM3B/SPISIMOA/ECAP1 bidirectional General-purpose I/O 5 with ePWM3 output B, SPI-A slave-in/master-out or eCAP1 alternates.
63 GPIO4/EPWM3A bidirectional General-purpose I/O 4 with ePWM3 output A and HRPWM channel as alternate function.
64 GPIO40/EPWM7A bidirectional General-purpose I/O 40 with ePWM7 output A and HRPWM channel as alternate function.
65 GPIO10/EPWM6A/ADCSOCBO bidirectional General-purpose I/O 10 with ePWM6 output A (HRPWM) or ADC start-of-conversion B output alternates.
66 GPIO3/EPWM2B/SPISOMIA/COMP2OUT bidirectional General-purpose I/O 3 with ePWM2 output B, SPI-A slave-out/master-in or comparator 2 output alternates.
67 GPIO2/EPWM2A bidirectional General-purpose I/O 2 with ePWM2 output A and HRPWM channel as alternate function.
68 GPIO1/EPWM1B/COMP1OUT bidirectional General-purpose I/O 1 with ePWM1 output B or comparator 1 direct output alternates.
69 GPIO0/EPWM1A bidirectional General-purpose I/O 0 with ePWM1 output A and HRPWM channel as alternate function.
70 VDDIO power_in Digital I/O buffer and flash supply pin, recommended 2.97V to 3.63V, with a decoupling capacitor at each pin.
71 VSS power_in Digital ground pin.
72 VDD power_in CPU and logic digital power pin; with internal VREG place a 1.2uF capacitor between each VDD pin and ground.
73 VREGENZ input Internal VREG enable with internal pull-down; tie to VSS to enable the 1.8V VREG or to VDDIO to disable it and use an external 1.8V supply.
74 GPIO34/COMP2OUT/COMP3OUT bidirectional General-purpose I/O 34 with comparator 2 or comparator 3 direct output alternates, also used for boot mode selection.
75 GPIO15/TZ1/LINRXA/SPISTEB bidirectional General-purpose I/O 15 with trip zone 1, LIN receive or SPI-B slave transmit enable alternates.
76 GPIO13/TZ2/SPISOMIB bidirectional General-purpose I/O 13 with trip zone 2 or SPI-B slave-out/master-in alternates.
77 GPIO14/TZ3/LINTXA/SPICLKB bidirectional General-purpose I/O 14 with trip zone 3, LIN transmit or SPI-B clock alternates.
78 GPIO20/EQEP1A/COMP1OUT bidirectional General-purpose I/O 20 with eQEP1 input A or comparator 1 direct output alternates.
79 GPIO21/EQEP1B/COMP2OUT bidirectional General-purpose I/O 21 with eQEP1 input B or comparator 2 direct output alternates.
80 GPIO24/ECAP1/SPISIMOB bidirectional General-purpose I/O 24 with eCAP1 or SPI-B slave-in/master-out alternates.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-80(12x12)
Category Embedded Processors & Controllers
Pins 80

CAD (KiCad official)

  • Symbol: TMS320F28035PNQ
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: tms320f28035pnq-etched.step / tms320f28035pnq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tms320f28035pnq.step / tms320f28035pnq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (176 pp, sha256 cb9ccecfd6b5c484, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF