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TMS320F28035PAGTR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TMS320F28035PAGTR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TQFP-64(10x10)

TMS320F28035PAGTR from Texas Instruments, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GPIO22/EQEP1S/LINTXA output General-purpose I/O 22 or Enhanced QEP1 strobe output or LIN transmit A output
2 GPIO32/SDAA/EPWMSYNCI/ADCSOCAO bidirectional General-purpose I/O 32 or I2C SDA open-drain or ePWM external sync input or ADC SOC A output
3 GPIO33/SCLA/EPWMSYNCO/ADCSOCBO bidirectional General-purpose I/O 33 or I2C SCL open-drain or ePWM external sync output or ADC SOC B output
4 GPIO23/EQEP1I/LINRXA bidirectional General-purpose I/O 23 or Enhanced QEP1 index input or LIN receive A input
5 VDD power_in CPU and logic digital power supply; place 1.2µF decoupling capacitor between each VDD pin and ground
6 VSS power_in Digital ground reference
7 XRS bidirectional Device reset input and watchdog reset output; place 2.2kΩ-10kΩ resistor between XRS and VDDIO
8 TRST input JTAG test reset input with internal pull-down; requires external 2.2kΩ pull-up resistor
9 ADCINA7 input ADC group A channel 7 analog input
10 ADCINA6/COMP3A/AIO6 input ADC group A channel 6 analog input or Comparator 3 input A or Analog I/O 6
11 ADCINA4/COMP2A/AIO4 input ADC group A channel 4 analog input or Comparator 2 input A or Analog I/O 4
12 ADCINA3 input ADC group A channel 3 analog input
13 ADCINA2/COMP1A/AIO2 input ADC group A channel 2 analog input or Comparator 1 input A or Analog I/O 2
14 ADCINA1 input ADC group A channel 1 analog input
15 ADCINA0/VREFHI input ADC group A channel 0 analog input; shared with external ADC reference high; cannot use simultaneously
16 VDDA power_in Analog power supply; place 2.2µF decoupling capacitor nearby
17 VSSA/VREFLO power_in Analog ground and external ADC reference low; VREFLO always connected to VSSA
18 ADCINB0 input ADC group B channel 0 analog input
19 ADCINB1 input ADC group B channel 1 analog input
20 ADCINB2/COMP1B/AIO10 input ADC group B channel 2 analog input or Comparator 1 input B or Analog I/O 10
21 ADCINB3 input ADC group B channel 3 analog input
22 ADCINB4/COMP2B/AIO12 input ADC group B channel 4 analog input or Comparator 2 input B or Analog I/O 12
23 ADCINB6/COMP3B/AIO14 input ADC group B channel 6 analog input or Comparator 3 input B or Analog I/O 14
24 ADCINB7 input ADC group B channel 7 analog input
25 GPIO31/CANTXA output General-purpose I/O 31 or CAN transmit output
26 GPIO30/CANRXA input General-purpose I/O 30 or CAN receive input
27 GPIO29/SCITXDA/SCLA/TZ3 output General-purpose I/O 29 or SCI transmit output or I2C SCL open-drain or Trip Zone 3 input
28 VSS power_in Digital ground reference
29 VDDIO power_in Digital I/O buffer and flash memory power supply; place decoupling capacitor on each pin
30 TEST2 bidirectional Test pin reserved for TI; must remain unconnected
31 GPIO9/EPWM5B/LINTXA/HRCAP1 bidirectional General-purpose I/O 9 or ePWM5 output B or LIN transmit A or High-resolution capture 1 input
32 GPIO28/SCIRXDA/SDAA/TZ2 input General-purpose I/O 28 or SCI receive input or I2C SDA open-drain or Trip Zone 2 input
33 GPIO18/SPICLKA/LINTXA/XCLKOUT bidirectional General-purpose I/O 18 or SPI-A clock or LIN transmit A or System clock output (divider configurable)
34 GPIO17/SPISOMIA/TZ3 bidirectional General-purpose I/O 17 or SPI-A slave-out/master-in or Trip Zone 3 input
35 GPIO8/EPWM5A/ADCSOCAO output General-purpose I/O 8 or ePWM5 output A or ADC SOC A output
36 GPIO16/SPISIMOA/TZ2 bidirectional General-purpose I/O 16 or SPI-A slave-in/master-out or Trip Zone 2 input
37 GPIO12/TZ1/SCITXDA output General-purpose I/O 12 or Trip Zone 1 input or SCI-A transmit output
38 GPIO7/EPWM4B/SCIRXDA input General-purpose I/O 7 or ePWM4 output B or SCI-A receive input
39 GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO bidirectional General-purpose I/O 6 or ePWM4 output A or ePWM external sync input or ePWM external sync output
40 X2 output On-chip crystal oscillator output; leave unconnected if crystal oscillator not used
41 X1 input On-chip 1.8V crystal oscillator input; connect crystal/resonator between X1 and X2 or connect to GND if not used
42 VSS power_in Digital ground reference
43 VDD power_in CPU and logic digital power supply; place 1.2µF decoupling capacitor between each VDD pin and ground
44 GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1 bidirectional General-purpose I/O 19 or External clock input or SPI-A slave transmit enable or LIN receive A or Enhanced capture 1
45 GPIO38/TCK/XCLKIN input General-purpose I/O 38 or JTAG test clock or External clock input; used for debug; disable external clock path during JTAG sessions
46 GPIO37/TDO output General-purpose I/O 37 or JTAG test data output (8mA drive); shifted out on TCK falling edge
47 GPIO35/TDI input General-purpose I/O 35 or JTAG test data input with internal pull-up; latched on TCK rising edge
48 GPIO36/TMS input General-purpose I/O 36 or JTAG test mode select with internal pull-up; controls TAP controller
49 GPIO11/EPWM6B/LINRXA/HRCAP2 input General-purpose I/O 11 or ePWM6 output B or LIN receive A input or High-resolution capture 2 input
50 GPIO5/EPWM3B/SPISIMOA/ECAP1 bidirectional General-purpose I/O 5 or ePWM3 output B or SPI-A slave-in/master-out or Enhanced capture 1
51 GPIO4/EPWM3A output General-purpose I/O 4 or ePWM3 output A
52 GPIO10/EPWM6A/ADCSOCBO output General-purpose I/O 10 or ePWM6 output A or ADC SOC B output
53 GPIO3/EPWM2B/SPISOMIA/COMP2OUT bidirectional General-purpose I/O 3 or ePWM2 output B or SPI-A slave-out/master-in or Comparator 2 direct output
54 GPIO2/EPWM2A output General-purpose I/O 2 or ePWM2 output A
55 GPIO1/EPWM1B/COMP1OUT bidirectional General-purpose I/O 1 or ePWM1 output B or Comparator 1 direct output
56 GPIO0/EPWM1A output General-purpose I/O 0 or ePWM1 output A with HRPWM channel support
57 VDDIO power_in Digital I/O buffer and flash memory power supply; place decoupling capacitor on each pin
58 VSS power_in Digital ground reference
59 VDD power_in CPU and logic digital power supply; place 1.2µF decoupling capacitor between each VDD pin and ground
60 VREGENZ input Internal voltage regulator enable; connect to VSS (low) to enable 1.8V VREG or to VDDIO (high) to use external 1.8V supply
61 GPIO34/COMP2OUT/COMP3OUT output General-purpose I/O 34 or Comparator 2 direct output or Comparator 3 direct output
62 GPIO20/EQEP1A/COMP1OUT bidirectional General-purpose I/O 20 or Enhanced QEP1 input A or Comparator 1 direct output
63 GPIO21/EQEP1B/COMP2OUT bidirectional General-purpose I/O 21 or Enhanced QEP1 input B or Comparator 2 direct output
64 GPIO24/ECAP1 bidirectional General-purpose I/O 24 or Enhanced capture 1 input/output

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: TMS320F28035PAGTR
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: tms320f28035pagtr-etched.step / tms320f28035pagtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tms320f28035pagtr.step / tms320f28035pagtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (176 pp, sha256 cb9ccecfd6b5c484, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF