component
TMS320F28034PAGQ
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTMS320F28034PAGQ
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TQFP-64(10x10)
TMS320F28034PAGQ from Texas Instruments, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO22/EQEP1S/LINTXA | bidirectional | General-purpose I/O 22 with alternate functions eQEP1 strobe (I/O) and LIN transmit (O); inputs are not 5 V tolerant. |
| 2 | GPIO32/SDAA/EPWMSYNCI/ADCSOCAO | bidirectional | General-purpose I/O 32 with alternate functions I2C-A data (open-drain), ePWM sync input and ADC SOC-A output; inputs are not 5 V tolerant. |
| 3 | GPIO33/SCLA/EPWMSYNCO/ADCSOCBO | bidirectional | General-purpose I/O 33 with alternate functions I2C-A clock (open-drain), ePWM sync output and ADC SOC-B output; inputs are not 5 V tolerant. |
| 4 | GPIO23/EQEP1I/LINRXA | bidirectional | General-purpose I/O 23 with alternate functions eQEP1 index (I/O) and LIN receive (input); inputs are not 5 V tolerant. |
| 5 | VDD | power_in | CPU and logic digital supply; with the internal VREG enabled, place at least 1.2 µF per VDD pin, and with VREG disabled supply 1.71-1.995 V externally. |
| 6 | VSS | power_in | Digital ground. |
| 7 | XRS | bidirectional | Device reset input and watchdog reset output (open-drain with internal pull-up, driven low during POR/BOR and for 512 OSCCLK cycles on watchdog reset); a 2.2 kΩ to 10 kΩ resistor to VDDIO is required and any noise capacitor to VSS must be 100 nF or less. |
| 8 | TRST | input | JTAG test reset with internal pull-down that must be held low during normal operation and needs an external pull-up (about 2.2 kΩ typical). |
| 9 | ADCINA7 | input | ADC group A channel 7 analog input with 0 V to 3.3 V full-scale range in internal reference mode. |
| 10 | ADCINA6/COMP3A/AIO6 | input | ADC group A channel 6 analog input, also comparator 3A input and digital AIO6; AIO pins have no internal pull-up. |
| 11 | ADCINA4/COMP2A/AIO4 | input | ADC group A channel 4 analog input, also comparator 2A input and digital AIO4; AIO pins have no internal pull-up. |
| 12 | ADCINA3 | input | ADC group A channel 3 analog input. |
| 13 | ADCINA2/COMP1A/AIO2 | input | ADC group A channel 2 analog input, also comparator 1A input and digital AIO2; AIO pins have no internal pull-up. |
| 14 | ADCINA1 | input | ADC group A channel 1 analog input. |
| 15 | ADCINA0/VREFHI | input | ADC group A channel 0 input that shares the pin with VREFHI (external ADC reference high, external reference mode only), so the two functions cannot be used together. |
| 16 | VDDA | power_in | Analog supply, 2.97 V to 3.63 V; place about 2.2 µF near this pin. |
| 17 | VSSA/VREFLO | power_in | Analog ground; on the 64-pin PAG device VREFLO is always tied to VSSA through this pin. |
| 18 | ADCINB0 | input | ADC group B channel 0 analog input. |
| 19 | ADCINB1 | input | ADC group B channel 1 analog input. |
| 20 | ADCINB2/COMP1B/AIO10 | input | ADC group B channel 2 analog input, also comparator 1B input and digital AIO10; AIO pins have no internal pull-up. |
| 21 | ADCINB3 | input | ADC group B channel 3 analog input. |
| 22 | ADCINB4/COMP2B/AIO12 | input | ADC group B channel 4 analog input, also comparator 2B input and digital AIO12; AIO pins have no internal pull-up. |
| 23 | ADCINB6/COMP3B/AIO14 | input | ADC group B channel 6 analog input, also comparator 3B input and digital AIO14; AIO pins have no internal pull-up. |
| 24 | ADCINB7 | input | ADC group B channel 7 analog input. |
| 25 | GPIO31/CANTXA | bidirectional | General-purpose I/O 31 with alternate function eCAN-A transmit (output); inputs are not 5 V tolerant. |
| 26 | GPIO30/CANRXA | bidirectional | General-purpose I/O 30 with alternate function eCAN-A receive (input); inputs are not 5 V tolerant. |
| 27 | GPIO29/SCITXDA/SCLA/TZ3 | bidirectional | General-purpose I/O 29 with alternate functions SCI-A transmit (output), I2C-A clock (open-drain) and trip-zone 3 input; inputs are not 5 V tolerant. |
| 28 | VSS | power_in | Digital ground. |
| 29 | VDDIO | power_in | Digital I/O buffer and flash supply, 2.97 V to 3.63 V; place a decoupling capacitor on each pin. |
| 30 | TEST2 | unconnected | Reserved for TI test; must be left unconnected. |
| 31 | GPIO9/EPWM5B/LINTXA/HRCAP1 | bidirectional | General-purpose I/O 9 with alternate functions ePWM5B output, LIN transmit (output) and HRCAP1 input; inputs are not 5 V tolerant. |
| 32 | GPIO28/SCIRXDA/SDAA/TZ2 | bidirectional | General-purpose I/O 28 with alternate functions SCI-A receive (input), I2C-A data (open-drain) and trip-zone 2 input; inputs are not 5 V tolerant. |
| 33 | GPIO18/SPICLKA/LINTXA/XCLKOUT | bidirectional | General-purpose I/O 18 with alternate functions SPI-A clock (I/O), LIN transmit (output) and XCLKOUT (output, SYSCLKOUT/4 after reset when enabled). |
| 34 | GPIO17/SPISOMIA/TZ3 | bidirectional | General-purpose I/O 17 with alternate functions SPI-A slave output (I/O) and trip-zone 3 input; inputs are not 5 V tolerant. |
| 35 | GPIO8/EPWM5A/ADCSOCAO | bidirectional | General-purpose I/O 8 with alternate functions ePWM5A output (with HRPWM) and ADC SOC-A output. |
| 36 | GPIO16/SPISIMOA/TZ2 | bidirectional | General-purpose I/O 16 with alternate functions SPI-A slave input (I/O) and trip-zone 2 input; inputs are not 5 V tolerant. |
| 37 | GPIO12/TZ1/SCITXDA/SPISIMOB | bidirectional | General-purpose I/O 12 with alternate functions trip-zone 1 input, SCI-A transmit (output) and SPI-B slave output/master input (I/O). |
| 38 | GPIO7/EPWM4B/SCIRXDA | bidirectional | General-purpose I/O 7 with alternate functions ePWM4B output and SCI-A receive (input). |
| 39 | GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO | bidirectional | General-purpose I/O 6 with alternate functions ePWM4A output (with HRPWM), external ePWM sync input and external ePWM sync output. |
| 40 | X2 | output | On-chip crystal oscillator output; a crystal or ceramic resonator must be connected between X1 and X2, and X2 left unconnected if unused. |
| 41 | X1 | input | 1.8 V on-chip crystal oscillator input that must be tied to GND if unused and must never receive a 3.3 V signal. |
| 42 | VSS | power_in | Digital ground. |
| 43 | VDD | power_in | CPU and logic digital supply; with the internal VREG enabled, place at least 1.2 µF per VDD pin, and with VREG disabled supply 1.71-1.995 V externally. |
| 44 | GPIO19/XCLKIN/SPISTEA/LINRXA/ECAP1 | bidirectional | General-purpose I/O 19 with alternate functions external oscillator clock input XCLKIN, SPI-A slave transmit enable, LIN receive and eCAP1 I/O; GPIO19 may glitch during power-up when the internal VREG is used. |
| 45 | GPIO38/TCK/XCLKIN | bidirectional | General-purpose I/O 38 with JTAG test clock TCK (internal pull-up) and external oscillator input XCLKIN; the XCLKIN path must be disabled during JTAG debug sessions. |
| 46 | GPIO37/TDO | tri_state | JTAG scan data output (8 mA drive) shifted out on the TCK falling edge, also GPIO37; GPIO37 is a boot-mode select pin. |
| 47 | GPIO35/TDI | bidirectional | General-purpose I/O 35 with JTAG test data input TDI (internal pull-up) sampled on the TCK rising edge. |
| 48 | GPIO36/TMS | bidirectional | General-purpose I/O 36 with JTAG test mode select TMS (internal pull-up) sampled on the TCK rising edge. |
| 49 | GPIO11/EPWM6B/LINRXA/HRCAP2 | bidirectional | General-purpose I/O 11 with alternate functions ePWM6B output, LIN receive (input) and HRCAP2 input. |
| 50 | GPIO5/EPWM3B/SPISIMOA/ECAP1 | bidirectional | General-purpose I/O 5 with alternate functions ePWM3B output, SPI-A slave input (I/O) and eCAP1 I/O. |
| 51 | GPIO4/EPWM3A | bidirectional | General-purpose I/O 4 with alternate function ePWM3A output (with HRPWM). |
| 52 | GPIO10/EPWM6A/ADCSOCBO | bidirectional | General-purpose I/O 10 with alternate functions ePWM6A output (with HRPWM) and ADC SOC-B output. |
| 53 | GPIO3/EPWM2B/SPISOMIA/COMP2OUT | bidirectional | General-purpose I/O 3 with alternate functions ePWM2B output, SPI-A slave output (I/O) and comparator 2 direct output. |
| 54 | GPIO2/EPWM2A | bidirectional | General-purpose I/O 2 with alternate function ePWM2A output (with HRPWM). |
| 55 | GPIO1/EPWM1B/COMP1OUT | bidirectional | General-purpose I/O 1 with alternate functions ePWM1B output and comparator 1 direct output. |
| 56 | GPIO0/EPWM1A | bidirectional | General-purpose I/O 0 with alternate function ePWM1A output (with HRPWM). |
| 57 | VDDIO | power_in | Digital I/O buffer and flash supply, 2.97 V to 3.63 V; place a decoupling capacitor on each pin. |
| 58 | VSS | power_in | Digital ground. |
| 59 | VDD | power_in | CPU and logic digital supply; with the internal VREG enabled, place at least 1.2 µF per VDD pin, and with VREG disabled supply 1.71-1.995 V externally. |
| 60 | VREGENZ | input | Internal regulator enable with internal pull-down: tie to VSS to enable the 1.8 V VREG, or tie to VDDIO to disable it and use an external 1.8 V supply. |
| 61 | GPIO34/COMP2OUT/COMP3OUT | bidirectional | General-purpose I/O 34 with alternate functions comparator 2 direct output and comparator 3 direct output. |
| 62 | GPIO20/EQEP1A/COMP1OUT | bidirectional | General-purpose I/O 20 with alternate functions eQEP1 input A and comparator 1 direct output. |
| 63 | GPIO21/EQEP1B/COMP2OUT | bidirectional | General-purpose I/O 21 with alternate functions eQEP1 input B and comparator 2 direct output. |
| 64 | GPIO24/ECAP1 | bidirectional | General-purpose I/O 24 with alternate function eCAP1 I/O on this package (SPI-B is not listed for the PAG package). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
TMS320F28034PAGQ - Footprint:
Package_QFP:TQFP-64_10x10mm_P0.5mm - 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
tms320f28034pagq-etched.step/tms320f28034pagq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tms320f28034pagq.step/tms320f28034pagq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (176 pp, sha256
cb9ccecfd6b5c484, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).